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| author | Cameron Zwarich <zwarich@apple.com> | 2011-05-18 02:29:50 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-05-18 02:29:50 +0000 |
| commit | f9839e425745648fb72859e20920af27101acf0f (patch) | |
| tree | 127f413cd907a045f5f2c92d207cbc005eb8df68 | |
| parent | d7c55fe2ef9557d3fb0fe083ed8453b90b5f4e0d (diff) | |
| download | bcm5719-llvm-f9839e425745648fb72859e20920af27101acf0f.tar.gz bcm5719-llvm-f9839e425745648fb72859e20920af27101acf0f.zip | |
Fix typo.
llvm-svn: 131519
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index e3bc3fa9b3d..18d30083f8f 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -4866,13 +4866,13 @@ ARMTargetLowering::EmitAtomicCmpSwap(MachineInstr *MI, MachineRegisterInfo &MRI = BB->getParent()->getRegInfo(); unsigned scratch = - MRI.createVirtualRegister(isThumb2 ? ARM::tGPRRegisterClass + MRI.createVirtualRegister(isThumb2 ? ARM::rGPRRegisterClass : ARM::GPRRegisterClass); if (isThumb2) { - MRI.constrainRegClass(dest, ARM::tGPRRegisterClass); - MRI.constrainRegClass(oldval, ARM::tGPRRegisterClass); - MRI.constrainRegClass(newval, ARM::tGPRRegisterClass); + MRI.constrainRegClass(dest, ARM::rGPRRegisterClass); + MRI.constrainRegClass(oldval, ARM::rGPRRegisterClass); + MRI.constrainRegClass(newval, ARM::rGPRRegisterClass); } unsigned ldrOpc, strOpc; |
