summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-24 16:16:16 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-06-24 16:16:16 +0000
commitf8f1ace5bb95384946482cc5e94a04e1f6b216b5 (patch)
tree217ea1867c5963853555ea3224d2d82556741d11
parentfaeaedf8e938696497021adcd5925e5741c72f62 (diff)
downloadbcm5719-llvm-f8f1ace5bb95384946482cc5e94a04e1f6b216b5.tar.gz
bcm5719-llvm-f8f1ace5bb95384946482cc5e94a04e1f6b216b5.zip
ARC: Fix -Wimplicit-fallthrough
llvm-svn: 364195
-rw-r--r--llvm/lib/Target/ARC/ARCRegisterInfo.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARC/ARCRegisterInfo.cpp b/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
index 21f7110a904..9c8340ac8f8 100644
--- a/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
+++ b/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
@@ -82,9 +82,11 @@ static void ReplaceFrameIndex(MachineBasicBlock::iterator II,
switch (MI.getOpcode()) {
case ARC::LD_rs9:
assert((Offset % 4 == 0) && "LD needs 4 byte alignment.");
+ LLVM_FALLTHROUGH;
case ARC::LDH_rs9:
case ARC::LDH_X_rs9:
assert((Offset % 2 == 0) && "LDH needs 2 byte alignment.");
+ LLVM_FALLTHROUGH;
case ARC::LDB_rs9:
case ARC::LDB_X_rs9:
LLVM_DEBUG(dbgs() << "Building LDFI\n");
@@ -95,8 +97,10 @@ static void ReplaceFrameIndex(MachineBasicBlock::iterator II,
break;
case ARC::ST_rs9:
assert((Offset % 4 == 0) && "ST needs 4 byte alignment.");
+ LLVM_FALLTHROUGH;
case ARC::STH_rs9:
assert((Offset % 2 == 0) && "STH needs 2 byte alignment.");
+ LLVM_FALLTHROUGH;
case ARC::STB_rs9:
LLVM_DEBUG(dbgs() << "Building STFI\n");
BuildMI(MBB, II, dl, TII.get(MI.getOpcode()))
OpenPOWER on IntegriCloud