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| author | Sanjay Patel <spatel@rotateright.com> | 2017-01-14 23:12:29 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-01-14 23:12:29 +0000 |
| commit | f8ed0a5e9310f322586f506082937360f93b1126 (patch) | |
| tree | afb5119b3d9f1d3a33471e49ebc9dd2f896222f2 | |
| parent | 70110ec5827a1d776bdf6a80060ee89bce1ef746 (diff) | |
| download | bcm5719-llvm-f8ed0a5e9310f322586f506082937360f93b1126.tar.gz bcm5719-llvm-f8ed0a5e9310f322586f506082937360f93b1126.zip | |
[InstCombine] add test to show missed vector fold; NFC
llvm-svn: 292035
| -rw-r--r-- | llvm/test/Transforms/InstCombine/signext.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/signext.ll b/llvm/test/Transforms/InstCombine/signext.ll index bccadeb396f..66cee2460eb 100644 --- a/llvm/test/Transforms/InstCombine/signext.ll +++ b/llvm/test/Transforms/InstCombine/signext.ll @@ -72,6 +72,19 @@ define i32 @test6(i16 %P) { ret i32 %tmp.5 } +define <2 x i32> @test6_splat_vec(<2 x i12> %P) { +; CHECK-LABEL: @test6_splat_vec( +; CHECK-NEXT: [[Z:%.*]] = zext <2 x i12> %P to <2 x i32> +; CHECK-NEXT: [[SHL:%.*]] = shl nuw <2 x i32> [[Z]], <i32 20, i32 20> +; CHECK-NEXT: [[ASHR:%.*]] = ashr <2 x i32> [[SHL]], <i32 20, i32 20> +; CHECK-NEXT: ret <2 x i32> [[ASHR]] +; + %z = zext <2 x i12> %P to <2 x i32> + %shl = shl <2 x i32> %z, <i32 20, i32 20> + %ashr = ashr <2 x i32> %shl, <i32 20, i32 20> + ret <2 x i32> %ashr +} + define i32 @test7(i32 %x) { ; CHECK-LABEL: @test7( ; CHECK-NEXT: [[SUB:%.*]] = ashr i32 %x, 5 |
