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authorMatt Arsenault <Matthew.Arsenault@amd.com>2015-09-25 18:09:15 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2015-09-25 18:09:15 +0000
commitf743b838cb4497988b625964e4eaefee3e15e2a6 (patch)
tree5d5c10e798ead27368cd7555a3a9e5736b17b4a4
parenta556fe8ec36e0479c6e02fc8be7e6cd17444c7df (diff)
downloadbcm5719-llvm-f743b838cb4497988b625964e4eaefee3e15e2a6.tar.gz
bcm5719-llvm-f743b838cb4497988b625964e4eaefee3e15e2a6.zip
AMDGPU: Make getNamedOperandIdx declaration readonly
This matches how it is defined in the generated implementation. llvm-svn: 248598
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h1
-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrInfo.h2
2 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
index bbfa70ecffb..53e8b23b3d6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h
@@ -196,6 +196,7 @@ public:
};
namespace AMDGPU {
+ LLVM_READONLY
int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex);
} // End namespace AMDGPU
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 272b65104a8..c12caa7a21a 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -338,8 +338,10 @@ public:
/// \brief Returns the operand named \p Op. If \p MI does not have an
/// operand named \c Op, this function returns nullptr.
+ LLVM_READONLY
MachineOperand *getNamedOperand(MachineInstr &MI, unsigned OperandName) const;
+ LLVM_READONLY
const MachineOperand *getNamedOperand(const MachineInstr &MI,
unsigned OpName) const {
return getNamedOperand(const_cast<MachineInstr &>(MI), OpName);
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