diff options
author | Sanjay Patel <spatel@rotateright.com> | 2015-11-11 17:24:56 +0000 |
---|---|---|
committer | Sanjay Patel <spatel@rotateright.com> | 2015-11-11 17:24:56 +0000 |
commit | f74012919811355771c7aae93fc4237d3fb44bcd (patch) | |
tree | fce760e10753e79db63713dfd0a251703ed7cfc5 | |
parent | fe96beea57355f0ee954d42bff3d9e0aa4d8c8a5 (diff) | |
download | bcm5719-llvm-f74012919811355771c7aae93fc4237d3fb44bcd.tar.gz bcm5719-llvm-f74012919811355771c7aae93fc4237d3fb44bcd.zip |
[MIPS] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()
MIPS32 has instructions for efficient count-leading/trailing-zeros, so this should be
considered a cheap operation (and therefore fair game for speculation) for any MIPS32
implementation.
The net result of allowing this speculation for the regression tests in this patch is
that we get this code:
ctlz:
jr $ra
clz $2, $4
cttz:
addiu $1, $4, -1
not $2, $4
and $1, $2, $1
clz $1, $1
addiu $2, $zero, 32
jr $ra
subu $2, $2, $1
Instead of:
ctlz:
beqz $4, $BB0_2
addiu $2, $zero, 32
clz $2, $4
$BB0_2:
jr $ra
nop
cttz:
beqz $4, $BB1_2
addiu $2, $zero, 32
addiu $1, $4, -1
not $2, $4
and $1, $2, $1
clz $1, $1
addiu $2, $zero, 32
subu $2, $2, $1
$BB1_2:
jr $ra
nop
See D14469 for the larger motivation.
Differential Revision: http://reviews.llvm.org/D14500
llvm-svn: 252755
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 8 | ||||
-rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.h | 3 | ||||
-rw-r--r-- | llvm/test/Transforms/SimplifyCFG/Mips/cttz-ctlz.ll | 43 | ||||
-rw-r--r-- | llvm/test/Transforms/SimplifyCFG/Mips/lit.local.cfg | 5 |
4 files changed, 59 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 66c495bc3e9..142d14a13a2 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -834,6 +834,14 @@ SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) return SDValue(); } +bool MipsTargetLowering::isCheapToSpeculateCttz() const { + return Subtarget.hasMips32(); +} + +bool MipsTargetLowering::isCheapToSpeculateCtlz() const { + return Subtarget.hasMips32(); +} + void MipsTargetLowering::LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results, diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h index 8e2cb0b4a6c..b33e125b81b 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.h +++ b/llvm/lib/Target/Mips/MipsISelLowering.h @@ -235,6 +235,9 @@ namespace llvm { return MVT::i32; } + bool isCheapToSpeculateCttz() const override; + bool isCheapToSpeculateCtlz() const override; + void LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const override; diff --git a/llvm/test/Transforms/SimplifyCFG/Mips/cttz-ctlz.ll b/llvm/test/Transforms/SimplifyCFG/Mips/cttz-ctlz.ll new file mode 100644 index 00000000000..b4bfb51dd14 --- /dev/null +++ b/llvm/test/Transforms/SimplifyCFG/Mips/cttz-ctlz.ll @@ -0,0 +1,43 @@ +; RUN: opt -S -simplifycfg -mtriple=mips-linux-gnu < %s | FileCheck %s + +define i32 @ctlz(i32 %A) { +; CHECK-LABEL: @ctlz( +; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0 +; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true) +; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]] +; CHECK-NEXT: ret i32 [[SEL]] +entry: + %tobool = icmp eq i32 %A, 0 + br i1 %tobool, label %cond.end, label %cond.true + +cond.true: + %0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true) + br label %cond.end + +cond.end: + %cond = phi i32 [ %0, %cond.true ], [ 32, %entry ] + ret i32 %cond +} + +define i32 @cttz(i32 %A) { +; CHECK-LABEL: @cttz( +; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0 +; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true) +; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]] +; CHECK-NEXT: ret i32 [[SEL]] +entry: + %tobool = icmp eq i32 %A, 0 + br i1 %tobool, label %cond.end, label %cond.true + +cond.true: + %0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true) + br label %cond.end + +cond.end: + %cond = phi i32 [ %0, %cond.true ], [ 32, %entry ] + ret i32 %cond +} + +declare i32 @llvm.ctlz.i32(i32, i1) +declare i32 @llvm.cttz.i32(i32, i1) + diff --git a/llvm/test/Transforms/SimplifyCFG/Mips/lit.local.cfg b/llvm/test/Transforms/SimplifyCFG/Mips/lit.local.cfg new file mode 100644 index 00000000000..683bfdccb74 --- /dev/null +++ b/llvm/test/Transforms/SimplifyCFG/Mips/lit.local.cfg @@ -0,0 +1,5 @@ +config.suffixes = ['.ll'] + +targets = set(config.root.targets_to_build.split()) +if not 'Mips' in targets: + config.unsupported = True |