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authorMikhail Maltsev <mikhail.maltsev@arm.com>2019-07-19 15:20:32 +0000
committerMikhail Maltsev <mikhail.maltsev@arm.com>2019-07-19 15:20:32 +0000
commitf41e627157295b30c0c7802786c1bf9d23658a0f (patch)
treeba04cdd8755a0f18ba7c838bb109212bc05369f8
parentfd8a3651f74309ae0c795edd7407bd18e03d444e (diff)
downloadbcm5719-llvm-f41e627157295b30c0c7802786c1bf9d23658a0f.tar.gz
bcm5719-llvm-f41e627157295b30c0c7802786c1bf9d23658a0f.zip
[libunwind][ARM] Fix loading FP registers on big-endian targets
Summary: The function Unwind-EHABI.cpp:_Unwind_VRS_Pop loads the saved values of 64-bit FP registers as two 32-bit words because they might not be 8-byte aligned. Combining these words into a 64-bit value has to be done differently on big-endian platforms. Reviewers: ostannard, john.brawn, dmgreen Reviewed By: ostannard Subscribers: kristof.beyls, christof, libcxx-commits Tags: #libc Differential Revision: https://reviews.llvm.org/D64996 llvm-svn: 366587
-rw-r--r--libunwind/src/Unwind-EHABI.cpp9
1 files changed, 7 insertions, 2 deletions
diff --git a/libunwind/src/Unwind-EHABI.cpp b/libunwind/src/Unwind-EHABI.cpp
index 4ff5e318b5f..8ee37d0fbe4 100644
--- a/libunwind/src/Unwind-EHABI.cpp
+++ b/libunwind/src/Unwind-EHABI.cpp
@@ -941,8 +941,13 @@ _Unwind_VRS_Pop(_Unwind_Context *context, _Unwind_VRS_RegClass regclass,
// format 1", which is equivalent to FSTMD + a padding word.
for (uint32_t i = first; i < end; ++i) {
// SP is only 32-bit aligned so don't copy 64-bit at a time.
- uint64_t value = *sp++;
- value |= ((uint64_t)(*sp++)) << 32;
+ uint32_t w0 = *sp++;
+ uint32_t w1 = *sp++;
+#ifdef __LITTLE_ENDIAN__
+ uint64_t value = (w1 << 32) | w0;
+#else
+ uint64_t value = (w0 << 32) | w1;
+#endif
if (_Unwind_VRS_Set(context, regclass, i, representation, &value) !=
_UVRSR_OK)
return _UVRSR_FAILED;
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