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author | Sanjay Patel <spatel@rotateright.com> | 2019-03-22 15:33:47 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2019-03-22 15:33:47 +0000 |
commit | f39494e795591ff1412b463c27c280db9d5a4e61 (patch) | |
tree | 2aa08312d9f8b402e2c3c457e8a6fda58448c6c0 | |
parent | f493607d430d75e286d211a906efe223978fa867 (diff) | |
download | bcm5719-llvm-f39494e795591ff1412b463c27c280db9d5a4e61.tar.gz bcm5719-llvm-f39494e795591ff1412b463c27c280db9d5a4e61.zip |
[x86] auto-generate complete checks for test; NFC
llvm-svn: 356760
-rw-r--r-- | llvm/test/CodeGen/X86/cmov-double.ll | 48 |
1 files changed, 32 insertions, 16 deletions
diff --git a/llvm/test/CodeGen/X86/cmov-double.ll b/llvm/test/CodeGen/X86/cmov-double.ll index 994a027596c..f38b5e58ea5 100644 --- a/llvm/test/CodeGen/X86/cmov-double.ll +++ b/llvm/test/CodeGen/X86/cmov-double.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -o - %s | FileCheck %s target triple = "x86_64-unknown-unknown" @@ -5,12 +6,14 @@ target triple = "x86_64-unknown-unknown" ; cmovs, not by producing two conditions and using and on them. define i32 @select_and(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) { -; CHECK-LABEL: select_and -; CHECK-NOT: set -; CHECK-NOT: and[lb] -; CHECK-NOT: test -; CHECK: cmov -; CHECK: cmov +; CHECK-LABEL: select_and: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %edx, %eax +; CHECK-NEXT: ucomiss %xmm0, %xmm1 +; CHECK-NEXT: cmovbel %ecx, %eax +; CHECK-NEXT: cmpl %esi, %edi +; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: retq %cmp0 = icmp ult i32 %a0, %a1 %cmp1 = fcmp olt float %a2, %a3 %and = and i1 %cmp0, %cmp1 @@ -18,15 +21,18 @@ define i32 @select_and(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) ret i32 %res } -define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) { ; select with and i1 condition should be implemented as a series of 2 cmovs, not ; by producing two conditions and using and on them. -; CHECK-LABEL: select_or -; CHECK-NOT: set -; CHECK-NOT: or[lb] -; CHECK-NOT: test -; CHECK: cmov -; CHECK: cmov + +define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) { +; CHECK-LABEL: select_or: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %ecx, %eax +; CHECK-NEXT: ucomiss %xmm0, %xmm1 +; CHECK-NEXT: cmoval %edx, %eax +; CHECK-NEXT: cmpl %esi, %edi +; CHECK-NEXT: cmovbl %edx, %eax +; CHECK-NEXT: retq %cmp0 = icmp ult i32 %a0, %a1 %cmp1 = fcmp olt float %a2, %a3 %and = or i1 %cmp0, %cmp1 @@ -39,9 +45,19 @@ define i32 @select_or(i32 %a0, i32 %a1, float %a2, float %a3, i32 %a4, i32 %a5) @var32 = global i32 0 define i32 @select_noopt(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) { -; CHECK-LABEL: select_noopt -; CHECK: cmov -; CHECK-NOT: cmov +; CHECK-LABEL: select_noopt: +; CHECK: # %bb.0: +; CHECK-NEXT: movl %ecx, %eax +; CHECK-NEXT: cmpl %esi, %edi +; CHECK-NEXT: setb %cl +; CHECK-NEXT: cmpl %edx, %esi +; CHECK-NEXT: setb %dl +; CHECK-NEXT: orb %cl, %dl +; CHECK-NEXT: movzbl %dl, %ecx +; CHECK-NEXT: movl %ecx, {{.*}}(%rip) +; CHECK-NEXT: testb %cl, %cl +; CHECK-NEXT: cmovel %r8d, %eax +; CHECK-NEXT: retq %cmp0 = icmp ult i32 %a0, %a1 %cmp1 = icmp ult i32 %a1, %a2 %or = or i1 %cmp0, %cmp1 |