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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-05 03:35:34 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-05 03:35:34 +0000 |
commit | f28cf0cbaf255e55bbbde1a714e7fc94fb4f16b4 (patch) | |
tree | fcb822586e02c07e03f7d10b3183d03bafc2a588 | |
parent | d931642cc7b246378e947e6f06886dbf0bb79141 (diff) | |
download | bcm5719-llvm-f28cf0cbaf255e55bbbde1a714e7fc94fb4f16b4.tar.gz bcm5719-llvm-f28cf0cbaf255e55bbbde1a714e7fc94fb4f16b4.zip |
Add addrspacecast node to tablegen
The node is still defined oddly so that the
address spaces are not operands and not accessible
from tablegen, but as-is this can now be used to write
a ComplexPattern with an addrspacecast root node.
llvm-svn: 228270
-rw-r--r-- | llvm/include/llvm/Target/TargetSelectionDAG.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/include/llvm/Target/TargetSelectionDAG.td b/llvm/include/llvm/Target/TargetSelectionDAG.td index 907baa1b9b1..744a7b0c97a 100644 --- a/llvm/include/llvm/Target/TargetSelectionDAG.td +++ b/llvm/include/llvm/Target/TargetSelectionDAG.td @@ -371,6 +371,7 @@ def zext : SDNode<"ISD::ZERO_EXTEND", SDTIntExtendOp>; def anyext : SDNode<"ISD::ANY_EXTEND" , SDTIntExtendOp>; def trunc : SDNode<"ISD::TRUNCATE" , SDTIntTruncOp>; def bitconvert : SDNode<"ISD::BITCAST" , SDTUnaryOp>; +def addrspacecast : SDNode<"ISD::ADDRSPACECAST", SDTUnaryOp>; def extractelt : SDNode<"ISD::EXTRACT_VECTOR_ELT", SDTVecExtract>; def insertelt : SDNode<"ISD::INSERT_VECTOR_ELT", SDTVecInsert>; |