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author | Craig Topper <craig.topper@intel.com> | 2017-09-21 00:18:46 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-09-21 00:18:46 +0000 |
commit | f0ba3003329a7ba9cc60a81b315e8d306afa8c42 (patch) | |
tree | 120752d64fddd5e0b6a71397eab5ae214656b14c | |
parent | 6fb3b428a4f3b64ad8e38afe6c772b4ee34efaf7 (diff) | |
download | bcm5719-llvm-f0ba3003329a7ba9cc60a81b315e8d306afa8c42.tar.gz bcm5719-llvm-f0ba3003329a7ba9cc60a81b315e8d306afa8c42.zip |
[SelectionDAG] Replace a flag that can never be true with an assert.
llvm-svn: 313847
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 3f658fa0376..4004d69c580 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -421,9 +421,8 @@ bool TargetLowering::ShrinkDemandedOp(SDValue Op, unsigned BitWidth, Op.getOpcode(), dl, SmallVT, DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(0)), DAG.getNode(ISD::TRUNCATE, dl, SmallVT, Op.getOperand(1))); - bool NeedZext = DemandedSize > SmallVTBits; - SDValue Z = DAG.getNode(NeedZext ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND, - dl, Op.getValueType(), X); + assert(DemandedSize <= SmallVTBits && "Narrowed below demanded bits?"); + SDValue Z = DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), X); return TLO.CombineTo(Op, Z); } } |