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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-22 22:45:24 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-09-22 22:45:24 +0000 |
commit | f05864ad7d4f53b21c809837071bde99afe28568 (patch) | |
tree | 0b0d3a61e8dc1edb40eaa265efde67fddff686f1 | |
parent | fbf0fba9f4bf0f4a966d8eed1a9f622ffea5728f (diff) | |
download | bcm5719-llvm-f05864ad7d4f53b21c809837071bde99afe28568.tar.gz bcm5719-llvm-f05864ad7d4f53b21c809837071bde99afe28568.zip |
Add support for GR32 <-> FR32 cross class copies.
We already support GR64 <-> VR128 copies. All of these copies break
partial register dependencies by zeroing the high part of the target
register.
llvm-svn: 140348
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 03471c73973..614202c2d56 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -2158,6 +2158,17 @@ static unsigned CopyToFromAsymmetricReg(unsigned DestReg, unsigned SrcReg, return X86::MOV64toSDrr; } + // SrcReg(FR32) -> DestReg(GR32) + // SrcReg(GR32) -> DestReg(FR32) + + if (X86::GR32RegClass.contains(DestReg) && X86::FR32RegClass.contains(SrcReg)) + // Copy from a FR32 register to a GR32 register. + return HasAVX ? X86::VMOVSS2DIrr : X86::MOVSS2DIrr; + + if (X86::FR32RegClass.contains(DestReg) && X86::GR32RegClass.contains(SrcReg)) + // Copy from a GR32 register to a FR32 register. + return HasAVX ? X86::VMOVDI2SSrr : X86::MOVDI2SSrr; + return 0; } |