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authorJonas Paulsson <paulsson@linux.vnet.ibm.com>2016-05-02 09:37:44 +0000
committerJonas Paulsson <paulsson@linux.vnet.ibm.com>2016-05-02 09:37:44 +0000
commitf0344826b90a4624ab79da75739d85a5baa7ceae (patch)
tree44e16c3532214da032a577562303583e4f501aea
parent9028acf0b3cc1ab044f7262cc7067d0b7554a879 (diff)
downloadbcm5719-llvm-f0344826b90a4624ab79da75739d85a5baa7ceae.tar.gz
bcm5719-llvm-f0344826b90a4624ab79da75739d85a5baa7ceae.zip
[SystemZ] Fix in restoreCalleeSavedRegisters()
Only add operands for GRs to the LMG. Reviewed by Ulrich Weigand. llvm-svn: 268216
-rw-r--r--llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
index ebf880eac0a..0bdfaf67c40 100644
--- a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
@@ -258,7 +258,8 @@ restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
// Do a second scan adding regs as being defined by instruction
for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
unsigned Reg = CSI[I].getReg();
- if (Reg != LowGPR && Reg != HighGPR)
+ if (Reg != LowGPR && Reg != HighGPR &&
+ SystemZ::GR64BitRegClass.contains(Reg))
MIB.addReg(Reg, RegState::ImplicitDefine);
}
}
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