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author | Benjamin Kramer <benny.kra@googlemail.com> | 2012-09-21 16:26:41 +0000 |
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committer | Benjamin Kramer <benny.kra@googlemail.com> | 2012-09-21 16:26:41 +0000 |
commit | efb4d34bcf83191cac46e346af323b5a8b21c823 (patch) | |
tree | ecc83395b99d3d209697ea46a71359b800177e10 | |
parent | 29ebecb11ab538cab4247a064fba51e61f0a2b9c (diff) | |
download | bcm5719-llvm-efb4d34bcf83191cac46e346af323b5a8b21c823.tar.gz bcm5719-llvm-efb4d34bcf83191cac46e346af323b5a8b21c823.zip |
InstCombine: Make sure we use the pre-zext type when creating a constant of a value that is zext'd.
Fixes PR13250.
llvm-svn: 164377
-rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp | 3 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/div-shift.ll | 14 |
2 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp index 2a7182fc1d4..3361a1e7fbe 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -477,7 +477,8 @@ Instruction *InstCombiner::visitUDiv(BinaryOperator &I) { if (match(Op1, m_Shl(m_Power2(CI), m_Value(N))) || match(Op1, m_ZExt(m_Shl(m_Power2(CI), m_Value(N))))) { if (*CI != 1) - N = Builder->CreateAdd(N, ConstantInt::get(I.getType(),CI->logBase2())); + N = Builder->CreateAdd(N, + ConstantInt::get(N->getType(), CI->logBase2())); if (ZExtInst *Z = dyn_cast<ZExtInst>(Op1)) N = Builder->CreateZExt(N, Z->getDestTy()); if (I.isExact()) diff --git a/llvm/test/Transforms/InstCombine/div-shift.ll b/llvm/test/Transforms/InstCombine/div-shift.ll index a07f3ea9491..e0372ebac18 100644 --- a/llvm/test/Transforms/InstCombine/div-shift.ll +++ b/llvm/test/Transforms/InstCombine/div-shift.ll @@ -21,3 +21,17 @@ define i64 @t2(i64 %x, i32 %y) nounwind { %3 = udiv i64 %x, %2 ret i64 %3 } + +; PR13250 +define i64 @t3(i64 %x, i32 %y) nounwind { +; CHECK: t3 +; CHECK-NOT: udiv +; CHECK-NEXT: %1 = add i32 %y, 2 +; CHECK-NEXT: %2 = zext i32 %1 to i64 +; CHECK-NEXT: %3 = lshr i64 %x, %2 +; CHECK-NEXT: ret i64 %3 + %1 = shl i32 4, %y + %2 = zext i32 %1 to i64 + %3 = udiv i64 %x, %2 + ret i64 %3 +} |