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| author | Oliver Stannard <oliver.stannard@arm.com> | 2016-09-05 13:49:26 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2016-09-05 13:49:26 +0000 |
| commit | ef38d53a7e0b7ad22fe5a9e6a590a73b7b693889 (patch) | |
| tree | 718aa9e44cf46fc1153bb3710f0119aec6dc501d | |
| parent | f852ac88f3ee041dce5a33d902990b19027bfc0f (diff) | |
| download | bcm5719-llvm-ef38d53a7e0b7ad22fe5a9e6a590a73b7b693889.tar.gz bcm5719-llvm-ef38d53a7e0b7ad22fe5a9e6a590a73b7b693889.zip | |
[SimplifyCFG] Add test for sinking inline asm in if/else
This test code previously caused a failure in the module verifier,
because SimplifyCFG created this invalid instruction, which tries to
take the address of inline asm:
%.sink = select i1 %1, i64 ()* asm "mov $0, #1", "=r", i64 ()* asm %"mov $0, #2", "=r"
This has been fixed recently, presumably by James Molloy's patches that
re-wrote and changed parts of SimplifyCFG, so this patch just adds a
regression test for it.
Differential Revision: https://reviews.llvm.org/D24231
llvm-svn: 280660
| -rw-r--r-- | llvm/test/Transforms/SimplifyCFG/inline-asm-sink.ll | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/test/Transforms/SimplifyCFG/inline-asm-sink.ll b/llvm/test/Transforms/SimplifyCFG/inline-asm-sink.ll new file mode 100644 index 00000000000..7fbaa735059 --- /dev/null +++ b/llvm/test/Transforms/SimplifyCFG/inline-asm-sink.ll @@ -0,0 +1,29 @@ +; RUN: opt < %s -simplifycfg -S | FileCheck %s + +define i32 @test(i32 %x) { +; CHECK-LABEL: @test +entry: + %y = alloca i32, align 4 + %tobool = icmp ne i32 %x, 0 + br i1 %tobool, label %if.then, label %if.else + +if.then: +; CHECK-LABEL: if.then: +; CHECK: [[ASM1:%.*]] = call i32 asm "mov $0, #1", "=r"() + %tmp1 = call i32 asm "mov $0, #1", "=r"() nounwind readnone + store i32 %tmp1, i32* %y, align 4 + br label %if.end + +if.else: +; CHECK-LABEL: if.else: +; CHECK: [[ASM2:%.*]] = call i32 asm "mov $0, #2", "=r"() + %tmp2 = call i32 asm "mov $0, #2", "=r"() nounwind readnone + store i32 %tmp2, i32* %y, align 4 + br label %if.end + +if.end: +; CHECK-LABEL: if.end: +; CHECK: {{%.*}} = phi i32 [ [[ASM2]], %if.else ], [ [[ASM1]], %if.then ] + %tmp3 = load i32, i32* %y, align 4 + ret i32 %tmp3 +} |

