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authorEvan Cheng <evan.cheng@apple.com>2009-07-23 07:58:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-07-23 07:58:08 +0000
commitedda8cbfad067b2520d8080cd45b433487ba2e7f (patch)
tree1ac62b7ca3171f8c7a161dc572ce723613ee642d
parentef5cfd43b305748964e094ebe6b3e3ef8dfb6c71 (diff)
downloadbcm5719-llvm-edda8cbfad067b2520d8080cd45b433487ba2e7f.tar.gz
bcm5719-llvm-edda8cbfad067b2520d8080cd45b433487ba2e7f.zip
80 col violation.
llvm-svn: 76872
-rw-r--r--llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 7002ff74790..9e21f3cf719 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -1407,11 +1407,13 @@ emitEpilogue(MachineFunction &MF,
AFI->getDPRCalleeSavedAreaOffset()||
hasFP(MF)) {
if (NumBytes)
- BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::SUBri)), ARM::SP).addReg(FramePtr)
+ BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::SUBri)), ARM::SP)
+ .addReg(FramePtr)
.addImm(NumBytes)
.addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
else
- BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::MOVr)), ARM::SP).addReg(FramePtr)
+ BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::MOVr)), ARM::SP)
+ .addReg(FramePtr)
.addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
}
} else if (NumBytes) {
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