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authorSanjay Patel <spatel@rotateright.com>2016-10-14 15:55:34 +0000
committerSanjay Patel <spatel@rotateright.com>2016-10-14 15:55:34 +0000
commitecd0da2619cf51e5e559c1e143c8ede9fdaa089b (patch)
tree7dd27596945ff9e76878a6ee6631a43b44ff201d
parenta3bc38b36d7b92796ea42604a7b09cba24e62eec (diff)
downloadbcm5719-llvm-ecd0da2619cf51e5e559c1e143c8ede9fdaa089b.tar.gz
bcm5719-llvm-ecd0da2619cf51e5e559c1e143c8ede9fdaa089b.zip
[InstCombine] add tests for missing vector folds
llvm-svn: 284245
-rw-r--r--llvm/test/Transforms/InstCombine/sub-xor.ll11
-rw-r--r--llvm/test/Transforms/InstCombine/sub.ll22
2 files changed, 33 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/sub-xor.ll b/llvm/test/Transforms/InstCombine/sub-xor.ll
index 98c2dd5df81..ce411aa6080 100644
--- a/llvm/test/Transforms/InstCombine/sub-xor.ll
+++ b/llvm/test/Transforms/InstCombine/sub-xor.ll
@@ -12,6 +12,17 @@ define i32 @test1(i32 %x) {
ret i32 %sub
}
+define <2 x i32> @test1vec(<2 x i32> %x) {
+; CHECK-LABEL: @test1vec(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, <i32 31, i32 31>
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> <i32 63, i32 63>, [[AND]]
+; CHECK-NEXT: ret <2 x i32> [[SUB]]
+;
+ %and = and <2 x i32> %x, <i32 31, i32 31>
+ %sub = sub <2 x i32> <i32 63, i32 63>, %and
+ ret <2 x i32> %sub
+}
+
declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
define i32 @test2(i32 %x) nounwind {
diff --git a/llvm/test/Transforms/InstCombine/sub.ll b/llvm/test/Transforms/InstCombine/sub.ll
index 540bdc980d8..3fa366a993f 100644
--- a/llvm/test/Transforms/InstCombine/sub.ll
+++ b/llvm/test/Transforms/InstCombine/sub.ll
@@ -152,6 +152,28 @@ define i32 @test13(i32 %A) {
ret i32 %C
}
+define <2 x i32> @test12vec(<2 x i32> %A) {
+; CHECK-LABEL: @test12vec(
+; CHECK-NEXT: [[B:%.*]] = ashr <2 x i32> %A, <i32 31, i32 31>
+; CHECK-NEXT: [[C:%.*]] = sub nsw <2 x i32> zeroinitializer, [[B]]
+; CHECK-NEXT: ret <2 x i32> [[C]]
+;
+ %B = ashr <2 x i32> %A, <i32 31, i32 31>
+ %C = sub <2 x i32> zeroinitializer, %B
+ ret <2 x i32> %C
+}
+
+define <2 x i32> @test13vec(<2 x i32> %A) {
+; CHECK-LABEL: @test13vec(
+; CHECK-NEXT: [[B:%.*]] = lshr <2 x i32> %A, <i32 31, i32 31>
+; CHECK-NEXT: [[C:%.*]] = sub nsw <2 x i32> zeroinitializer, [[B]]
+; CHECK-NEXT: ret <2 x i32> [[C]]
+;
+ %B = lshr <2 x i32> %A, <i32 31, i32 31>
+ %C = sub <2 x i32> zeroinitializer, %B
+ ret <2 x i32> %C
+}
+
define i32 @test15(i32 %A, i32 %B) {
; CHECK-LABEL: @test15(
; CHECK-NEXT: [[C:%.*]] = sub i32 0, %A
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