summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDerek Schuff <dschuff@google.com>2016-03-28 22:52:20 +0000
committerDerek Schuff <dschuff@google.com>2016-03-28 22:52:20 +0000
commitecabac6244f67c477ae2e8f71c41bb12d35e42be (patch)
tree0b7509f0bc5c7bc5b63b0276146382a909fb443f
parent69ada2f514cf5b27e9e5a0eab2bb1c59caef4900 (diff)
downloadbcm5719-llvm-ecabac6244f67c477ae2e8f71c41bb12d35e42be.tar.gz
bcm5719-llvm-ecabac6244f67c477ae2e8f71c41bb12d35e42be.zip
[WebAssembly] Remove duplicate disabling of passes
Also put all the disabled passes together llvm-svn: 264684
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp18
1 files changed, 6 insertions, 12 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index ba13c2f97af..5c7e96da256 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -106,7 +106,6 @@ public:
bool addILPOpts() override;
void addPreRegAlloc() override;
void addPostRegAlloc() override;
- void addMachineLateOptimization() override;
bool addGCPasses() override { return false; }
void addPreEmitPass() override;
};
@@ -180,15 +179,19 @@ void WebAssemblyPassConfig::addPostRegAlloc() {
// TODO: The following CodeGen passes don't currently support code containing
// virtual registers. Consider removing their restrictions and re-enabling
// them.
- //
// Has no asserts of its own, but was not written to handle virtual regs.
disablePass(&ShrinkWrapID);
// We use our own PrologEpilogInserter which is very slightly modified to
// tolerate virtual registers.
disablePass(&PrologEpilogCodeInserterID);
- // Fails with: should be run after register allocation.
+
+ // These functions all require the AllVRegsAllocated property.
disablePass(&MachineCopyPropagationID);
+ disablePass(&PostRASchedulerID);
+ disablePass(&FuncletLayoutID);
+ disablePass(&StackMapLivenessID);
+ disablePass(&LiveDebugValuesID);
if (getOptLevel() != CodeGenOpt::None) {
// Mark registers as representing wasm's expression stack.
@@ -206,20 +209,11 @@ void WebAssemblyPassConfig::addPostRegAlloc() {
addPass(createWebAssemblyPEI());
}
-void WebAssemblyPassConfig::addMachineLateOptimization() {
- disablePass(&MachineCopyPropagationID);
- disablePass(&PostRASchedulerID);
- TargetPassConfig::addMachineLateOptimization();
-}
-
void WebAssemblyPassConfig::addPreEmitPass() {
TargetPassConfig::addPreEmitPass();
// Eliminate multiple-entry loops.
addPass(createWebAssemblyFixIrreducibleControlFlow());
- disablePass(&FuncletLayoutID);
- disablePass(&StackMapLivenessID);
- disablePass(&LiveDebugValuesID);
// Put the CFG in structured form; insert BLOCK and LOOP markers.
addPass(createWebAssemblyCFGStackify());
OpenPOWER on IntegriCloud