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authorTom Stellard <tstellar@redhat.com>2018-07-06 17:16:17 +0000
committerTom Stellard <tstellar@redhat.com>2018-07-06 17:16:17 +0000
commitec4feae1b668892f9e120dcac77c70ef39b37db9 (patch)
tree1e16a8c0482b025546b571c6e30ecc49d607e35b
parent373d6ed7cf24e28de441cfeef4d14c4c0a20c905 (diff)
downloadbcm5719-llvm-ec4feae1b668892f9e120dcac77c70ef39b37db9.tar.gz
bcm5719-llvm-ec4feae1b668892f9e120dcac77c70ef39b37db9.zip
AMDGPU: Fix UBSan error caused by r335942
Summary: Fixes PR38071. Reviewers: arsenm, dstenb Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D48979 llvm-svn: 336448
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp3
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h40
-rw-r--r--llvm/lib/Target/AMDGPU/R600ISelLowering.cpp2
3 files changed, 21 insertions, 24 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index a1b90195411..87819f3294b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -3939,7 +3939,8 @@ SDValue AMDGPUTargetLowering::loadInputValue(SelectionDAG &DAG,
uint32_t AMDGPUTargetLowering::getImplicitParameterOffset(
const MachineFunction &MF, const ImplicitParameter Param) const {
const AMDGPUMachineFunction *MFI = MF.getInfo<AMDGPUMachineFunction>();
- const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>();
+ const AMDGPUCommonSubtarget &ST =
+ AMDGPUCommonSubtarget::get(getTargetMachine(), MF.getFunction());
unsigned ExplicitArgOffset = ST.getExplicitKernelArgOffset(MF.getFunction());
unsigned Alignment = ST.getAlignmentForImplicitArgPtr();
uint64_t ArgOffset = alignTo(MFI->getExplicitKernArgSize(), Alignment) +
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index d21301a6a9f..251ad8d2fc8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -114,6 +114,18 @@ public:
return TargetTriple.getOS() == Triple::AMDPAL;
}
+ bool isMesa3DOS() const {
+ return TargetTriple.getOS() == Triple::Mesa3D;
+ }
+
+ bool isMesaKernel(const Function &F) const {
+ return isMesa3DOS() && !AMDGPU::isShader(F.getCallingConv());
+ }
+
+ bool isAmdCodeObjectV2(const Function &F) const {
+ return isAmdHsaOS() || isMesaKernel(F);
+ }
+
bool has16BitInsts() const {
return Has16BitInsts;
}
@@ -166,6 +178,12 @@ public:
return isAmdHsaOS() ? 8 : 4;
}
+ /// Returns the offset in bytes from the start of the input buffer
+ /// of the first explicit kernel argument.
+ unsigned getExplicitKernelArgOffset(const Function &F) const {
+ return isAmdCodeObjectV2(F) ? 0 : 36;
+ }
+
/// \returns Maximum number of work groups per compute unit supported by the
/// subtarget and limited by given \p FlatWorkGroupSize.
unsigned getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const {
@@ -384,10 +402,6 @@ public:
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
- bool isMesa3DOS() const {
- return TargetTriple.getOS() == Triple::Mesa3D;
- }
-
Generation getGeneration() const {
return (Generation)Gen;
}
@@ -603,19 +617,11 @@ public:
return HasUnpackedD16VMem;
}
- bool isMesaKernel(const Function &F) const {
- return isMesa3DOS() && !AMDGPU::isShader(F.getCallingConv());
- }
-
// Covers VS/PS/CS graphics shaders
bool isMesaGfxShader(const Function &F) const {
return isMesa3DOS() && AMDGPU::isShader(F.getCallingConv());
}
- bool isAmdCodeObjectV2(const Function &F) const {
- return isAmdHsaOS() || isMesaKernel(F);
- }
-
bool hasMad64_32() const {
return getGeneration() >= SEA_ISLANDS;
}
@@ -652,12 +658,6 @@ public:
return D16PreservesUnusedBits;
}
- /// Returns the offset in bytes from the start of the input buffer
- /// of the first explicit kernel argument.
- unsigned getExplicitKernelArgOffset(const Function &F) const {
- return isAmdCodeObjectV2(F) ? 0 : 36;
- }
-
/// \returns Number of bytes of arguments that are passed to a shader or
/// kernel in addition to the explicit ones declared for the function.
unsigned getImplicitArgNumBytes(const Function &F) const {
@@ -1088,10 +1088,6 @@ public:
bool hasFMA() const { return FMA; }
- unsigned getExplicitKernelArgOffset(const MachineFunction &MF) const {
- return 36;
- }
-
bool hasCFAluBug() const { return CFALUBug; }
bool hasVertexCache() const { return HasVertexCache; }
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
index 0c31deb8c18..bddab439f3b 100644
--- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -1658,7 +1658,7 @@ SDValue R600TargetLowering::LowerFormalArguments(
unsigned ValBase = ArgLocs[In.getOrigArgIndex()].getLocMemOffset();
unsigned PartOffset = VA.getLocMemOffset();
- unsigned Offset = Subtarget->getExplicitKernelArgOffset(MF) +
+ unsigned Offset = Subtarget->getExplicitKernelArgOffset(MF.getFunction()) +
VA.getLocMemOffset();
MachinePointerInfo PtrInfo(UndefValue::get(PtrTy), PartOffset - ValBase);
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