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authorDavid Blaikie <dblaikie@gmail.com>2015-03-04 19:56:44 +0000
committerDavid Blaikie <dblaikie@gmail.com>2015-03-04 19:56:44 +0000
commiteb6c31f900713bfd841f8bea5c0c7d2834ecf4c7 (patch)
treedd2e8a3b3d78aab3243ab06f52f71ce58e9fa7d0
parentbb8d1562adfafe2c35b798bf11f7dc80406faa3a (diff)
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Add a FIXME for PR22796, broken ordering of ClassInfo in TableGen
As discussed (at length) in code review of r222935, with Duncan. llvm-svn: 231282
-rw-r--r--llvm/utils/TableGen/AsmMatcherEmitter.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 909ecd4665f..ac95b1459f3 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -264,6 +264,11 @@ public:
}
/// operator< - Compare two classes.
+ // FIXME: This ordering seems to be broken. For example:
+ // u64 < i64, i64 < s8, s8 < u64, forming a cycle
+ // u64 is a subset of i64
+ // i64 and s8 are not subsets of each other, so are ordered by name
+ // s8 and u64 are not subsets of each other, so are ordered by name
bool operator<(const ClassInfo &RHS) const {
if (this == &RHS)
return false;
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