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authorCraig Topper <craig.topper@gmail.com>2011-10-23 00:33:32 +0000
committerCraig Topper <craig.topper@gmail.com>2011-10-23 00:33:32 +0000
commite94d277db8bb8dda6beef4a6731c24a7a10fc47d (patch)
treed998a852620ede249563e6d98e0618c9d953427b
parent7412aa9886c1f3a23414d764a28404661e5d38ce (diff)
downloadbcm5719-llvm-e94d277db8bb8dda6beef4a6731c24a7a10fc47d.tar.gz
bcm5719-llvm-e94d277db8bb8dda6beef4a6731c24a7a10fc47d.zip
Add X86 MULX instruction for disassembler.
llvm-svn: 142738
-rw-r--r--llvm/lib/Target/X86/X86InstrArithmetic.td24
-rw-r--r--llvm/test/MC/Disassembler/X86/simple-tests.txt12
-rw-r--r--llvm/test/MC/Disassembler/X86/x86-32.txt12
3 files changed, 48 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrArithmetic.td b/llvm/lib/Target/X86/X86InstrArithmetic.td
index 6c49b9ec063..c99c52d4772 100644
--- a/llvm/lib/Target/X86/X86InstrArithmetic.td
+++ b/llvm/lib/Target/X86/X86InstrArithmetic.td
@@ -1171,3 +1171,27 @@ let Predicates = [HasBMI], Defs = [EFLAGS] in {
defm ANDN32 : bmi_andn<"andn{l}", GR32, i32mem, loadi32>, T8, VEX_4V;
defm ANDN64 : bmi_andn<"andn{q}", GR64, i64mem, loadi64>, T8, VEX_4V, VEX_W;
}
+
+//===----------------------------------------------------------------------===//
+// MULX Instruction
+//
+multiclass bmi_mulx<string mnemonic, RegisterClass RC, X86MemOperand x86memop> {
+let neverHasSideEffects = 1 in {
+ let isCommutable = 1 in
+ def rr : I<0xF6, MRMSrcReg, (outs RC:$dst1, RC:$dst2), (ins RC:$src),
+ !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"),
+ []>, T8XD, VEX_4V;
+
+ let mayLoad = 1 in
+ def rm : I<0xF6, MRMSrcMem, (outs RC:$dst1, RC:$dst2), (ins x86memop:$src),
+ !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"),
+ []>, T8XD, VEX_4V;
+}
+}
+
+let Predicates = [HasBMI2] in {
+ let Uses = [EDX] in
+ defm MULX32 : bmi_mulx<"mulx{l}", GR32, i32mem>;
+ let Uses = [RDX] in
+ defm MULX64 : bmi_mulx<"mulx{q}", GR64, i64mem>, VEX_W;
+}
diff --git a/llvm/test/MC/Disassembler/X86/simple-tests.txt b/llvm/test/MC/Disassembler/X86/simple-tests.txt
index 37cde91be5d..23c30f8f459 100644
--- a/llvm/test/MC/Disassembler/X86/simple-tests.txt
+++ b/llvm/test/MC/Disassembler/X86/simple-tests.txt
@@ -587,3 +587,15 @@
# CHECK: pdepq (%rax), %r11, %r10
0xc4 0x62 0xa3 0xf5 0x10
+
+# CHECK: mulxl %r12d, %r11d, %r10d
+0xc4 0x42 0x23 0xf6 0xd4
+
+# CHECK: mulxl (%rax), %r11d, %r10d
+0xc4 0x62 0x23 0xf6 0x10
+
+# CHECK: mulxq %r12, %r11, %r10
+0xc4 0x42 0xa3 0xf6 0xd4
+
+# CHECK: mulxq (%rax), %r11, %r10
+0xc4 0x62 0xa3 0xf6 0x10
diff --git a/llvm/test/MC/Disassembler/X86/x86-32.txt b/llvm/test/MC/Disassembler/X86/x86-32.txt
index 51901a53c51..b01c4eff5cc 100644
--- a/llvm/test/MC/Disassembler/X86/x86-32.txt
+++ b/llvm/test/MC/Disassembler/X86/x86-32.txt
@@ -531,3 +531,15 @@
# CHECK: pdepl (%eax), %ecx, %edx
0xc4 0xe2 0x73 0xf5 0x10
+
+# CHECK: mulxl %esp, %ecx, %edx
+0xc4 0xe2 0x73 0xf6 0xd4
+
+# CHECK: mulxl (%eax), %ecx, %edx
+0xc4 0xe2 0x73 0xf6 0x10
+
+# CHECK: mulxl %esp, %ecx, %edx
+0xc4 0xe2 0xf3 0xf6 0xd4
+
+# CHECK: mulxl (%eax), %ecx, %edx
+0xc4 0xe2 0xf3 0xf6 0x10
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