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| author | Abderrazek Zaafrani <a.zaafrani@samsung.com> | 2018-01-19 23:10:56 +0000 |
|---|---|---|
| committer | Abderrazek Zaafrani <a.zaafrani@samsung.com> | 2018-01-19 23:10:56 +0000 |
| commit | e93c63d468d36e67cb15d183ecc6b8216c87c138 (patch) | |
| tree | e25dd8ba4167ce0d806dd8517d7ff0acf1dc29a5 | |
| parent | 20b49240b837c5cf72029fc7b57a0eaed7fab5ae (diff) | |
| download | bcm5719-llvm-e93c63d468d36e67cb15d183ecc6b8216c87c138.tar.gz bcm5719-llvm-e93c63d468d36e67cb15d183ecc6b8216c87c138.zip | |
[AArch64] Add ARMv8.2-A FP16 scalar intrinsics
https://reviews.llvm.org/D41792
llvm-svn: 323005
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsAArch64.td | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td index 65c9aaab975..50341338c39 100644 --- a/llvm/include/llvm/IR/IntrinsicsAArch64.td +++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td @@ -146,6 +146,9 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.". class AdvSIMD_CvtFPToFx_Intrinsic : Intrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem]>; + + class AdvSIMD_1Arg_Intrinsic + : Intrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrNoMem]>; } // Arithmetic ops @@ -244,7 +247,7 @@ let TargetPrefix = "aarch64", IntrProperties = [IntrNoMem] in { // Vector Max def int_aarch64_neon_smax : AdvSIMD_2VectorArg_Intrinsic; def int_aarch64_neon_umax : AdvSIMD_2VectorArg_Intrinsic; - def int_aarch64_neon_fmax : AdvSIMD_2VectorArg_Intrinsic; + def int_aarch64_neon_fmax : AdvSIMD_2FloatArg_Intrinsic; def int_aarch64_neon_fmaxnmp : AdvSIMD_2VectorArg_Intrinsic; // Vector Max Across Lanes @@ -256,7 +259,7 @@ let TargetPrefix = "aarch64", IntrProperties = [IntrNoMem] in { // Vector Min def int_aarch64_neon_smin : AdvSIMD_2VectorArg_Intrinsic; def int_aarch64_neon_umin : AdvSIMD_2VectorArg_Intrinsic; - def int_aarch64_neon_fmin : AdvSIMD_2VectorArg_Intrinsic; + def int_aarch64_neon_fmin : AdvSIMD_2FloatArg_Intrinsic; def int_aarch64_neon_fminnmp : AdvSIMD_2VectorArg_Intrinsic; // Vector Min/Max Number @@ -354,7 +357,7 @@ let TargetPrefix = "aarch64", IntrProperties = [IntrNoMem] in { def int_aarch64_neon_sqxtun : AdvSIMD_1VectorArg_Narrow_Intrinsic; // Vector Absolute Value - def int_aarch64_neon_abs : AdvSIMD_1IntArg_Intrinsic; + def int_aarch64_neon_abs : AdvSIMD_1Arg_Intrinsic; // Vector Saturating Absolute Value def int_aarch64_neon_sqabs : AdvSIMD_1IntArg_Intrinsic; |
