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authorBob Wilson <bob.wilson@apple.com>2010-06-25 21:17:19 +0000
committerBob Wilson <bob.wilson@apple.com>2010-06-25 21:17:19 +0000
commite70c8b150b5e4ede7c9238659ec19675a6cfe0e2 (patch)
tree44e8466cfd8e79c5cafd2f095d5e43689c956ac1
parenta765c28db3199f9511e1206d1addc3621d688cff (diff)
downloadbcm5719-llvm-e70c8b150b5e4ede7c9238659ec19675a6cfe0e2.tar.gz
bcm5719-llvm-e70c8b150b5e4ede7c9238659ec19675a6cfe0e2.zip
Add support for encoding 2-register NEON instructions.
llvm-svn: 106891
-rw-r--r--llvm/lib/Target/ARM/ARMCodeEmitter.cpp28
1 files changed, 25 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
index 8281d68bce4..0269afa3d4d 100644
--- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -139,7 +139,8 @@ namespace {
void emitMiscInstruction(const MachineInstr &MI);
- void emitNEON1RegModImm(const MachineInstr &MI);
+ void emitNEON1RegModImmInstruction(const MachineInstr &MI);
+ void emitNEON2RegInstruction(const MachineInstr &MI);
/// getMachineOpValue - Return binary encoding of operand. If the machine
/// operand requires relocation, record the relocation and return zero.
@@ -412,7 +413,10 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
break;
// NEON instructions.
case ARMII::N1RegModImmFrm:
- emitNEON1RegModImm(MI);
+ emitNEON1RegModImmInstruction(MI);
+ break;
+ case ARMII::N2RegFrm:
+ emitNEON2RegInstruction(MI);
break;
}
MCE.processDebugLoc(MI.getDebugLoc(), false);
@@ -1555,7 +1559,16 @@ static unsigned encodeNEONRd(const MachineInstr &MI, unsigned OpIdx) {
return Binary;
}
-void ARMCodeEmitter::emitNEON1RegModImm(const MachineInstr &MI) {
+static unsigned encodeNEONRm(const MachineInstr &MI, unsigned OpIdx) {
+ unsigned RegM = MI.getOperand(OpIdx).getReg();
+ unsigned Binary = 0;
+ RegM = ARMRegisterInfo::getRegisterNumbering(RegM);
+ Binary |= (RegM & 0xf);
+ Binary |= ((RegM >> 4) & 1) << ARMII::M_BitShift;
+ return Binary;
+}
+
+void ARMCodeEmitter::emitNEON1RegModImmInstruction(const MachineInstr &MI) {
unsigned Binary = getBinaryCodeForInstr(MI);
// Destination register is encoded in Dd.
Binary |= encodeNEONRd(MI, 0);
@@ -1574,4 +1587,13 @@ void ARMCodeEmitter::emitNEON1RegModImm(const MachineInstr &MI) {
emitWordLE(Binary);
}
+void ARMCodeEmitter::emitNEON2RegInstruction(const MachineInstr &MI) {
+ unsigned Binary = getBinaryCodeForInstr(MI);
+ // Destination register is encoded in Dd.
+ Binary |= encodeNEONRd(MI, 0);
+ Binary |= encodeNEONRm(MI, 1);
+ // FIXME: This does not handle VDUPfdf or VDUPfqf.
+ emitWordLE(Binary);
+}
+
#include "ARMGenCodeEmitter.inc"
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