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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-04-27 01:35:25 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-04-27 01:35:25 +0000 |
| commit | e68363a03ca541a55d67be1da05fea8a5a3c54af (patch) | |
| tree | 63957aff568da8a0e8a3a77de00f9dd37b55d93f | |
| parent | 6f879d9eb1a111a0c99f2a69e4ad30b220f4926a (diff) | |
| download | bcm5719-llvm-e68363a03ca541a55d67be1da05fea8a5a3c54af.tar.gz bcm5719-llvm-e68363a03ca541a55d67be1da05fea8a5a3c54af.zip | |
[X86] Re-enable MMX i32 extractelt combine.
This effectively adds back the extractelt combine removed by r262358:
the direct case can still occur (because x86_mmx is special, see
r262446), but it's the indirect case that's now superseded by the
generic combine.
llvm-svn: 267651
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 13 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_extract-mmx.ll | 15 |
2 files changed, 18 insertions, 10 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index c80bccf002a..d966d7249a3 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -25224,16 +25224,9 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG, InputVector.getValueType() == MVT::v2i32) { SDValue MMXSrc = InputVector.getNode()->getOperand(0); - // The mmx is indirect: (i64 extract_elt (v1i64 bitcast (x86mmx ...))). - if (MMXSrc.getOpcode() == ISD::EXTRACT_VECTOR_ELT && MMXSrc.hasOneUse() && - MMXSrc.getValueType() == MVT::i64) { - SDValue MMXSrcOp = MMXSrc.getOperand(0); - if (MMXSrcOp.hasOneUse() && MMXSrcOp.getOpcode() == ISD::BITCAST && - MMXSrcOp.getValueType() == MVT::v1i64 && - MMXSrcOp.getOperand(0).getValueType() == MVT::x86mmx) - return DAG.getNode(X86ISD::MMX_MOVD2W, SDLoc(InputVector), - N->getValueType(0), MMXSrcOp.getOperand(0)); - } + // The bitcast source is a direct mmx result. + if (MMXSrc.getValueType() == MVT::x86mmx) + return DAG.getNode(X86ISD::MMX_MOVD2W, dl, MVT::i32, MMXSrc); } EVT VT = N->getValueType(0); diff --git a/llvm/test/CodeGen/X86/vec_extract-mmx.ll b/llvm/test/CodeGen/X86/vec_extract-mmx.ll index 6d64a9e5571..4d1ecd14af8 100644 --- a/llvm/test/CodeGen/X86/vec_extract-mmx.ll +++ b/llvm/test/CodeGen/X86/vec_extract-mmx.ll @@ -125,5 +125,20 @@ entry: ret i32 %7 } +define i32 @test3(x86_mmx %a) nounwind { +; X32-LABEL: test3: +; X32: # BB#0: +; X32-NEXT: movd %mm0, %eax +; X32-NEXT: retl +; +; X64-LABEL: test3: +; X64: # BB#0: +; X64-NEXT: movd %mm0, %eax +; X64-NEXT: retq + %tmp0 = bitcast x86_mmx %a to <2 x i32> + %tmp1 = extractelement <2 x i32> %tmp0, i32 0 + ret i32 %tmp1 +} + declare x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx, i8) declare void @llvm.x86.mmx.emms() |
