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authorSimon Atanasyan <simon@atanasyan.com>2015-03-09 10:53:24 +0000
committerSimon Atanasyan <simon@atanasyan.com>2015-03-09 10:53:24 +0000
commite604e8f9700e80308f230f3313a544441efcd03c (patch)
tree9a7e6c039a3bb9dbaba6f7fcc361b26f5426fa46
parent9af798f5e46a45178af33175800312393770a1d9 (diff)
downloadbcm5719-llvm-e604e8f9700e80308f230f3313a544441efcd03c.tar.gz
bcm5719-llvm-e604e8f9700e80308f230f3313a544441efcd03c.zip
[Mips] Show error message and stop linking in case of cross mode jump errors
llvm-svn: 231640
-rw-r--r--lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp28
-rw-r--r--lld/test/elf/Mips/jalx-align-err.test5
-rw-r--r--lld/test/elf/Mips/jump-fix-err.test4
-rw-r--r--lld/test/elf/Mips/plt-header-micro.test3
4 files changed, 23 insertions, 17 deletions
diff --git a/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp b/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
index 7719fe09f57..7cd002895f2 100644
--- a/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
+++ b/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
@@ -148,28 +148,31 @@ static void reloc32hi16(uint32_t &ins, uint64_t S, int64_t A) {
applyReloc(ins, (S + A + 0x8000) & 0xffff0000, 0xffffffff);
}
-static void adjustJumpOpCode(uint32_t &ins, uint64_t tgt, CrossJumpMode mode) {
+static std::error_code adjustJumpOpCode(uint32_t &ins, uint64_t tgt,
+ CrossJumpMode mode) {
if (mode == CrossJumpMode::None)
- return;
+ return std::error_code();
bool toMicro = mode == CrossJumpMode::ToMicro;
uint32_t opNative = toMicro ? 0x03 : 0x3d;
uint32_t opCross = toMicro ? 0x1d : 0x3c;
- // FIXME (simon): Convert this into the regular fatal error.
if ((tgt & 1) != toMicro)
- llvm_unreachable("Incorrect bit 0 for the jalx target");
+ return make_dynamic_error_code(
+ Twine("Incorrect bit 0 for the jalx target"));
if (tgt & 2)
- llvm::errs() << "The jalx target " << llvm::format_hex(tgt, 10)
- << " is not word-aligned.\n";
-
+ return make_dynamic_error_code(Twine("The jalx target 0x") +
+ Twine::utohexstr(tgt) +
+ " is not word-aligned");
uint8_t op = ins >> 26;
if (op != opNative && op != opCross)
- llvm::errs() << "Unsupported jump opcode (" << llvm::format_hex(op, 4)
- << ") for ISA modes cross call.\n";
- else
- ins = (ins & ~(0x3f << 26)) | (opCross << 26);
+ return make_dynamic_error_code(Twine("Unsupported jump opcode (0x") +
+ Twine::utohexstr(op) +
+ ") for ISA modes cross call");
+
+ ins = (ins & ~(0x3f << 26)) | (opCross << 26);
+ return std::error_code();
}
static bool isMicroMipsAtom(const Atom *a) {
@@ -273,7 +276,8 @@ std::error_code RelocationHandler<ELFT>::applyRelocation(
targetVAddress |= 1;
CrossJumpMode crossJump = getCrossJumpMode(ref);
- adjustJumpOpCode(ins, targetVAddress, crossJump);
+ if (auto ec = adjustJumpOpCode(ins, targetVAddress, crossJump))
+ return ec;
switch (ref.kindValue()) {
case R_MIPS_NONE:
diff --git a/lld/test/elf/Mips/jalx-align-err.test b/lld/test/elf/Mips/jalx-align-err.test
index ea30bd3a560..3db18fc98fa 100644
--- a/lld/test/elf/Mips/jalx-align-err.test
+++ b/lld/test/elf/Mips/jalx-align-err.test
@@ -1,9 +1,10 @@
# Check that LLD shows an error if jalx target value is not word-aligned.
# RUN: yaml2obj -format=elf %s > %t-obj
-# RUN: lld -flavor gnu -target mipsel -e T0 -o %t-exe %t-obj 2>&1 | FileCheck %s
+# RUN: not lld -flavor gnu -target mipsel -e T0 -o %t-exe %t-obj 2>&1 \
+# RUN: | FileCheck %s
-# CHECK: The jalx target 0x00400116 is not word-aligned.
+# CHECK: The jalx target 0x400116 is not word-aligned
!ELF
FileHeader: !FileHeader
diff --git a/lld/test/elf/Mips/jump-fix-err.test b/lld/test/elf/Mips/jump-fix-err.test
index 58698be1183..98117993839 100644
--- a/lld/test/elf/Mips/jump-fix-err.test
+++ b/lld/test/elf/Mips/jump-fix-err.test
@@ -2,9 +2,9 @@
# of replacing an unknown unstruction by jalx.
# RUN: yaml2obj -format=elf %s > %t-obj
-# RUN: lld -flavor gnu -target mipsel -o %t-exe %t-obj 2>&1 | FileCheck %s
+# RUN: not lld -flavor gnu -target mipsel -o %t-exe %t-obj 2>&1 | FileCheck %s
-# CHECK: Unsupported jump opcode (0x00) for ISA modes cross call.
+# CHECK: Unsupported jump opcode (0x0) for ISA modes cross call
!ELF
FileHeader: !FileHeader
diff --git a/lld/test/elf/Mips/plt-header-micro.test b/lld/test/elf/Mips/plt-header-micro.test
index 8935b77f47a..ce042741cd3 100644
--- a/lld/test/elf/Mips/plt-header-micro.test
+++ b/lld/test/elf/Mips/plt-header-micro.test
@@ -73,7 +73,8 @@ Sections:
Type: SHT_PROGBITS
Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
AddressAlign: 0x04
- Size: 0x20
+ Content: '000000000000000000f4000000000000f400000000000000f400000000000000'
+# jal .text jal glob jal T1
- Name: .rel.text
Type: SHT_REL
Link: .symtab
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