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authorIlia K <ki.stfu@gmail.com>2015-04-17 16:55:36 +0000
committerIlia K <ki.stfu@gmail.com>2015-04-17 16:55:36 +0000
commite56335c2650da9e05fe2677bc110b5e8edc9996c (patch)
treeab5625e810ed0b1499c312bdab88b473c683b1e6
parentc0f7dd72b7a4e6434696ce576d4820056ae41b52 (diff)
downloadbcm5719-llvm-e56335c2650da9e05fe2677bc110b5e8edc9996c.tar.gz
bcm5719-llvm-e56335c2650da9e05fe2677bc110b5e8edc9996c.zip
Fix the MiVarTestCase.test_lldbmi_var_create_register test to expect 32bit value on 32bit systems
llvm-svn: 235204
-rw-r--r--lldb/test/tools/lldb-mi/variable/TestMiVar.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/lldb/test/tools/lldb-mi/variable/TestMiVar.py b/lldb/test/tools/lldb-mi/variable/TestMiVar.py
index 1b6899dac16..93e1b87cfc3 100644
--- a/lldb/test/tools/lldb-mi/variable/TestMiVar.py
+++ b/lldb/test/tools/lldb-mi/variable/TestMiVar.py
@@ -219,7 +219,8 @@ class MiVarTestCase(lldbmi_testcase.MiTestCaseBase):
# Assign value to variable
self.runCmd("-var-assign var_reg \"6\"")
- self.expect("\^done,value=\"0x0000000000000006\"")
+ #FIXME: the output has different format for 32bit and 64bit values
+ self.expect("\^done,value=\"0x0*?6\"")
# Assert register 0 updated
self.runCmd("-data-list-register-values d 0")
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