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author | Daniel Dunbar <daniel@zuster.org> | 2009-11-25 02:13:23 +0000 |
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committer | Daniel Dunbar <daniel@zuster.org> | 2009-11-25 02:13:23 +0000 |
commit | e502433d7f19b6db757e3624fb12aefc9ae8a430 (patch) | |
tree | 67e9f3721c306abc8e38d85f165587a5c5cc9166 | |
parent | 3d9e90ae3e07a8982b37bb39746bf4a7a05ae67a (diff) | |
download | bcm5719-llvm-e502433d7f19b6db757e3624fb12aefc9ae8a430.tar.gz bcm5719-llvm-e502433d7f19b6db757e3624fb12aefc9ae8a430.zip |
Sketch TableGen disassembler emitter, based on patch by Sean Callanan.
llvm-svn: 89833
-rw-r--r-- | llvm/utils/TableGen/CMakeLists.txt | 1 | ||||
-rw-r--r-- | llvm/utils/TableGen/DisassemblerEmitter.cpp | 30 | ||||
-rw-r--r-- | llvm/utils/TableGen/DisassemblerEmitter.h | 28 | ||||
-rw-r--r-- | llvm/utils/TableGen/TableGen.cpp | 7 |
4 files changed, 66 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CMakeLists.txt b/llvm/utils/TableGen/CMakeLists.txt index d9ec6f7d1a1..daf86768265 100644 --- a/llvm/utils/TableGen/CMakeLists.txt +++ b/llvm/utils/TableGen/CMakeLists.txt @@ -8,6 +8,7 @@ add_executable(tblgen CodeGenInstruction.cpp CodeGenTarget.cpp DAGISelEmitter.cpp + DisassemblerEmitter.cpp FastISelEmitter.cpp InstrEnumEmitter.cpp InstrInfoEmitter.cpp diff --git a/llvm/utils/TableGen/DisassemblerEmitter.cpp b/llvm/utils/TableGen/DisassemblerEmitter.cpp new file mode 100644 index 00000000000..cc131257cff --- /dev/null +++ b/llvm/utils/TableGen/DisassemblerEmitter.cpp @@ -0,0 +1,30 @@ +//===- DisassemblerEmitter.cpp - Generate a disassembler ------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "DisassemblerEmitter.h" +#include "CodeGenTarget.h" +#include "Record.h" +using namespace llvm; + +void DisassemblerEmitter::run(raw_ostream &OS) { + CodeGenTarget Target; + + OS << "/*===- TableGen'erated file " + << "---------------------------------------*- C -*-===*\n" + << " *\n" + << " * " << Target.getName() << " Disassembler\n" + << " *\n" + << " * Automatically generated file, do not edit!\n" + << " *\n" + << " *===---------------------------------------------------------------" + << "-------===*/\n"; + + throw TGError(Target.getTargetRecord()->getLoc(), + "Unable to generate disassembler for this target"); +} diff --git a/llvm/utils/TableGen/DisassemblerEmitter.h b/llvm/utils/TableGen/DisassemblerEmitter.h new file mode 100644 index 00000000000..7229d81649e --- /dev/null +++ b/llvm/utils/TableGen/DisassemblerEmitter.h @@ -0,0 +1,28 @@ +//===- DisassemblerEmitter.h - Disassembler Generator -----------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef DISASSEMBLEREMITTER_H +#define DISASSEMBLEREMITTER_H + +#include "TableGenBackend.h" + +namespace llvm { + + class DisassemblerEmitter : public TableGenBackend { + RecordKeeper &Records; + public: + DisassemblerEmitter(RecordKeeper &R) : Records(R) {} + + /// run - Output the disassembler. + void run(raw_ostream &o); + }; + +} // end llvm namespace + +#endif diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp index c6c43062958..7c8d288db93 100644 --- a/llvm/utils/TableGen/TableGen.cpp +++ b/llvm/utils/TableGen/TableGen.cpp @@ -21,6 +21,7 @@ #include "ClangDiagnosticsEmitter.h" #include "CodeEmitterGen.h" #include "DAGISelEmitter.h" +#include "DisassemblerEmitter.h" #include "FastISelEmitter.h" #include "InstrEnumEmitter.h" #include "InstrInfoEmitter.h" @@ -46,6 +47,7 @@ enum ActionType { GenEmitter, GenRegisterEnums, GenRegister, GenRegisterHeader, GenInstrEnums, GenInstrs, GenAsmWriter, GenAsmMatcher, + GenDisassembler, GenCallingConv, GenClangDiagsDefs, GenClangDiagGroups, @@ -80,6 +82,8 @@ namespace { "Generate calling convention descriptions"), clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"), + clEnumValN(GenDisassembler, "gen-disassembler", + "Generate disassembler"), clEnumValN(GenAsmMatcher, "gen-asm-matcher", "Generate assembly instruction matcher"), clEnumValN(GenDAGISel, "gen-dag-isel", @@ -228,6 +232,9 @@ int main(int argc, char **argv) { case GenClangDiagGroups: ClangDiagGroupsEmitter(Records).run(*Out); break; + case GenDisassembler: + DisassemblerEmitter(Records).run(*Out); + break; case GenOptParserDefs: OptParserEmitter(Records, true).run(*Out); break; |