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| author | David Woodhouse <dwmw2@infradead.org> | 2014-01-22 15:08:58 +0000 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2014-01-22 15:08:58 +0000 |
| commit | e4e815d6600d022924d70a409b73a09335affa5d (patch) | |
| tree | 4dc9c65e86be66993714e3778eca9f8b549bd489 | |
| parent | 4ce66069a0762bd7d443bb5f50a402948db54f19 (diff) | |
| download | bcm5719-llvm-e4e815d6600d022924d70a409b73a09335affa5d.tar.gz bcm5719-llvm-e4e815d6600d022924d70a409b73a09335affa5d.zip | |
[x86] Remove now-unused isSrcOp() and isDstOp() from X86AsmParser
llvm-svn: 199810
| -rw-r--r-- | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index 56896a7a359..ff38e6f8ed8 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -593,14 +593,6 @@ private: /// the parsing mode (Intel vs. AT&T). bool doSrcDstMatch(X86Operand &Op1, X86Operand &Op2); - /// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi) - /// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode. - bool isSrcOp(X86Operand &Op); - - /// isDstOp - Returns true if operand is either (%rdi) or %es:(%rdi) - /// in 64bit mode or (%edi) or %es:(%edi) in 32bit mode. - bool isDstOp(X86Operand &Op); - bool is64BitMode() const { // FIXME: Can tablegen auto-generate this? return (STI.getFeatureBits() & X86::Mode64Bit) != 0; @@ -1176,28 +1168,6 @@ bool X86AsmParser::doSrcDstMatch(X86Operand &Op1, X86Operand &Op2) return true; } -bool X86AsmParser::isSrcOp(X86Operand &Op) { - unsigned basereg = - is64BitMode() ? X86::RSI : (is32BitMode() ? X86::ESI : X86::SI); - - return (Op.isMem() && - (Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::DS) && - isa<MCConstantExpr>(Op.Mem.Disp) && - cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 && - Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0); -} - -bool X86AsmParser::isDstOp(X86Operand &Op) { - unsigned basereg = - is64BitMode() ? X86::RDI : (is32BitMode() ? X86::EDI : X86::DI); - - return Op.isMem() && - (Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::ES) && - isa<MCConstantExpr>(Op.Mem.Disp) && - cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 && - Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0; -} - bool X86AsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { RegNo = 0; |

