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authorEric Christopher <echristo@gmail.com>2015-02-24 23:43:26 +0000
committerEric Christopher <echristo@gmail.com>2015-02-24 23:43:26 +0000
commite4c02c6450ff2579f9b3ff8976bd7fc3de9695eb (patch)
treeec6222ca4c7cd9f29fd0ec849a9adbc7fb6fa25f
parentd64412beb80daeb5eff64841b81248b0ad4d605d (diff)
downloadbcm5719-llvm-e4c02c6450ff2579f9b3ff8976bd7fc3de9695eb.tar.gz
bcm5719-llvm-e4c02c6450ff2579f9b3ff8976bd7fc3de9695eb.zip
Make this test not dependent upon the triple. All that was needed
was some flexibility in the check line for the comment basic block. llvm-svn: 230400
-rw-r--r--llvm/test/CodeGen/X86/mmx-fold-load.ll18
1 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/X86/mmx-fold-load.ll b/llvm/test/CodeGen/X86/mmx-fold-load.ll
index ef31ffc2a3d..e442774e2ad 100644
--- a/llvm/test/CodeGen/X86/mmx-fold-load.ll
+++ b/llvm/test/CodeGen/X86/mmx-fold-load.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
define i64 @t0(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t0:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psllq (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@@ -19,7 +19,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
define i64 @t1(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t1:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrlq (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@@ -36,7 +36,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32)
define i64 @t2(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t2:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psllw (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@@ -53,7 +53,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.w(x86_mmx, i32)
define i64 @t3(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t3:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrlw (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@@ -70,7 +70,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32)
define i64 @t4(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t4:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: pslld (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@@ -87,7 +87,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.d(x86_mmx, i32)
define i64 @t5(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t5:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrld (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@@ -104,7 +104,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.d(x86_mmx, i32)
define i64 @t6(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t6:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psraw (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
@@ -121,7 +121,7 @@ declare x86_mmx @llvm.x86.mmx.psrai.w(x86_mmx, i32)
define i64 @t7(<1 x i64>* %a, i32* %b) {
; CHECK-LABEL: t7:
-; CHECK: ## BB#0: ## %entry
+; CHECK: # BB#0:{{.*}} %entry
; CHECK-NEXT: movq (%rdi), %mm0
; CHECK-NEXT: psrad (%rsi), %mm0
; CHECK-NEXT: movd %mm0, %rax
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