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| author | Tim Northover <tnorthover@apple.com> | 2016-02-08 19:33:18 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-02-08 19:33:18 +0000 |
| commit | e316f762227846bb2eb8b68c17392a1b2bf073cc (patch) | |
| tree | a74c3ace3bc3d20638e94949e22bef2714b6c32c | |
| parent | e08381a529d8f93aa04f837c0992065080a89974 (diff) | |
| download | bcm5719-llvm-e316f762227846bb2eb8b68c17392a1b2bf073cc.tar.gz bcm5719-llvm-e316f762227846bb2eb8b68c17392a1b2bf073cc.zip | |
AArch64: match correct order in subtraction pattern.
The accumulator in multiply-and-subtract instructions is actually subtracted
*from* so these patterns were computing the wrong value.
llvm-svn: 260131
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.td | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-mul.ll | 12 |
2 files changed, 15 insertions, 5 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index 53999b9a6fc..9ca00949a68 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -766,12 +766,12 @@ def : Pat<(i64 (add (mul (sext_inreg GPR64:$Rn, i32), (s64imm_32bit:$C)), (SMADDLrrr (i32 (EXTRACT_SUBREG GPR64:$Rn, sub_32)), (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; -def : Pat<(i64 (sub (mul (sext GPR32:$Rn), (s64imm_32bit:$C)), GPR64:$Ra)), +def : Pat<(i64 (sub GPR64:$Ra, (mul (sext GPR32:$Rn), (s64imm_32bit:$C)))), (SMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; -def : Pat<(i64 (sub (mul (zext GPR32:$Rn), (i64imm_32bit:$C)), GPR64:$Ra)), +def : Pat<(i64 (sub GPR64:$Ra, (mul (zext GPR32:$Rn), (i64imm_32bit:$C)))), (UMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; -def : Pat<(i64 (sub (mul (sext_inreg GPR64:$Rn, i32), (s64imm_32bit:$C)), - GPR64:$Ra)), +def : Pat<(i64 (sub GPR64:$Ra, (mul (sext_inreg GPR64:$Rn, i32), + (s64imm_32bit:$C)))), (SMSUBLrrr (i32 (EXTRACT_SUBREG GPR64:$Rn, sub_32)), (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; } // AddedComplexity = 5 diff --git a/llvm/test/CodeGen/AArch64/arm64-mul.ll b/llvm/test/CodeGen/AArch64/arm64-mul.ll index 99924d8b794..a424dc761bc 100644 --- a/llvm/test/CodeGen/AArch64/arm64-mul.ll +++ b/llvm/test/CodeGen/AArch64/arm64-mul.ll @@ -137,6 +137,16 @@ entry: ; CHECK: umsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}} %tmp1 = zext i32 %a to i64 %tmp3 = mul i64 %tmp1, 12345678 - %tmp4 = sub i64 %tmp3, %b + %tmp4 = sub i64 %b, %tmp3 + ret i64 %tmp4 +} + +define i64 @t14(i32 %a, i64 %b) nounwind { +entry: +; CHECK-LABEL: t14: +; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}} + %tmp1 = sext i32 %a to i64 + %tmp3 = mul i64 %tmp1, -12345678 + %tmp4 = sub i64 %b, %tmp3 ret i64 %tmp4 } |
