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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-29 18:51:56 +0000 | 
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-29 18:51:56 +0000 | 
| commit | e2fabd35b5ca0dde327834523111d96e196d8f8b (patch) | |
| tree | 6fca49c71e0478e93daa4182d48ef1d981cb97a5 | |
| parent | 0040f18256689127d41186b98ceea0c2b3eb3550 (diff) | |
| download | bcm5719-llvm-e2fabd35b5ca0dde327834523111d96e196d8f8b.tar.gz bcm5719-llvm-e2fabd35b5ca0dde327834523111d96e196d8f8b.zip | |
R600/SI: Add isMUBUF / isMTBUF
Also add missing comments about how the flags work.
llvm-svn: 214195
| -rw-r--r-- | llvm/lib/Target/R600/SIDefines.h | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrFormats.td | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.h | 2 | 
4 files changed, 21 insertions, 1 deletions
| diff --git a/llvm/lib/Target/R600/SIDefines.h b/llvm/lib/Target/R600/SIDefines.h index b7e7a2d000b..6ae580c8614 100644 --- a/llvm/lib/Target/R600/SIDefines.h +++ b/llvm/lib/Target/R600/SIDefines.h @@ -12,6 +12,7 @@  #define SIDEFINES_H_  namespace SIInstrFlags { +// This needs to be kept in sync with the field bits in InstSI.  enum {    MIMG = 1 << 3,    SMRD = 1 << 4, @@ -19,7 +20,9 @@ enum {    VOP2 = 1 << 6,    VOP3 = 1 << 7,    VOPC = 1 << 8, -  SALU = 1 << 9 +  SALU = 1 << 9, +  MUBUF = 1 << 10, +  MTBUF = 1 << 11  };  } diff --git a/llvm/lib/Target/R600/SIInstrFormats.td b/llvm/lib/Target/R600/SIInstrFormats.td index d7b593d4a60..a2d8ee67c3e 100644 --- a/llvm/lib/Target/R600/SIInstrFormats.td +++ b/llvm/lib/Target/R600/SIInstrFormats.td @@ -24,7 +24,10 @@ class InstSI <dag outs, dag ins, string asm, list<dag> pattern> :    field bits<1> VOP3 = 0;    field bits<1> VOPC = 0;    field bits<1> SALU = 0; +  field bits<1> MUBUF = 0; +  field bits<1> MTBUF = 0; +  // These need to be kept in sync with the enum in SIInstrFlags.    let TSFlags{0} = VM_CNT;    let TSFlags{1} = EXP_CNT;    let TSFlags{2} = LGKM_CNT; @@ -35,6 +38,8 @@ class InstSI <dag outs, dag ins, string asm, list<dag> pattern> :    let TSFlags{7} = VOP3;    let TSFlags{8} = VOPC;    let TSFlags{9} = SALU; +  let TSFlags{10} = MUBUF; +  let TSFlags{11} = MTBUF;  }  class Enc32 { @@ -503,6 +508,7 @@ class MUBUF <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :    let VM_CNT = 1;    let EXP_CNT = 1; +  let MUBUF = 1;    let neverHasSideEffects = 1;    let UseNamedOperandTable = 1; @@ -513,6 +519,7 @@ class MTBUF <bits<3> op, dag outs, dag ins, string asm, list<dag> pattern> :    let VM_CNT = 1;    let EXP_CNT = 1; +  let MTBUF = 1;    let neverHasSideEffects = 1;  } diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index 872b7cef859..0bd54ec3370 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -483,6 +483,14 @@ bool SIInstrInfo::isSMRD(uint16_t Opcode) const {    return get(Opcode).TSFlags & SIInstrFlags::SMRD;  } +bool SIInstrInfo::isMUBUF(uint16_t Opcode) const { +  return get(Opcode).TSFlags & SIInstrFlags::MUBUF; +} + +bool SIInstrInfo::isMTBUF(uint16_t Opcode) const { +  return get(Opcode).TSFlags & SIInstrFlags::MTBUF; +} +  bool SIInstrInfo::isVOP1(uint16_t Opcode) const {    return get(Opcode).TSFlags & SIInstrFlags::VOP1;  } diff --git a/llvm/lib/Target/R600/SIInstrInfo.h b/llvm/lib/Target/R600/SIInstrInfo.h index 914138bfb6a..5b9b5a59126 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.h +++ b/llvm/lib/Target/R600/SIInstrInfo.h @@ -98,6 +98,8 @@ public:    bool isDS(uint16_t Opcode) const;    bool isMIMG(uint16_t Opcode) const;    bool isSMRD(uint16_t Opcode) const; +  bool isMUBUF(uint16_t Opcode) const; +  bool isMTBUF(uint16_t Opcode) const;    bool isVOP1(uint16_t Opcode) const;    bool isVOP2(uint16_t Opcode) const;    bool isVOP3(uint16_t Opcode) const; | 

