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| author | Amara Emerson <aemerson@apple.com> | 2018-04-10 19:01:58 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2018-04-10 19:01:58 +0000 |
| commit | e27d5016efed881df0deb467cbc70086a58c3730 (patch) | |
| tree | 383232f2f030fcdbf7211d02b9b4f2c4e6182cad | |
| parent | 213edc4a15dcd0bab5122b804f0bdeb76ce8e187 (diff) | |
| download | bcm5719-llvm-e27d5016efed881df0deb467cbc70086a58c3730.tar.gz bcm5719-llvm-e27d5016efed881df0deb467cbc70086a58c3730.zip | |
[AArch64] Fix isel failure when BUILD_PAIR nodes are left over.
rdar://39175175
llvm-svn: 329743
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/build-pair-isel.ll | 13 |
2 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 28edcc2e47b..19573e180ee 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -198,6 +198,8 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM, setOperationAction(ISD::FREM, MVT::f64, Expand); setOperationAction(ISD::FREM, MVT::f80, Expand); + setOperationAction(ISD::BUILD_PAIR, MVT::i64, Expand); + // Custom lowering hooks are needed for XOR // to fold it into CSINC/CSINV. setOperationAction(ISD::XOR, MVT::i32, Custom); diff --git a/llvm/test/CodeGen/AArch64/build-pair-isel.ll b/llvm/test/CodeGen/AArch64/build-pair-isel.ll new file mode 100644 index 00000000000..c9c50980173 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/build-pair-isel.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=aarch64 -o - -O0 %s | FileCheck %s +target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" +target triple = "arm64-apple-ios5.0.0" + +; This test checks we don't fail isel due to unhandled build_pair nodes. +; CHECK: bfi +define void @compare_and_swap128() { + %1 = call i128 asm sideeffect "nop", "=r,~{memory}"() + store i128 %1, i128* undef, align 16 + ret void +} + + |
