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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-07-08 14:52:56 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-07-08 14:52:56 +0000 |
| commit | e1a9b49d6b9c00948f8a49c008798ef3f3b75b65 (patch) | |
| tree | 1364363e0ccf134e917debb2c6c37cdd758ea7c4 | |
| parent | c5f552d7059631f2a5310cad673e962496cf0abe (diff) | |
| download | bcm5719-llvm-e1a9b49d6b9c00948f8a49c008798ef3f3b75b65.tar.gz bcm5719-llvm-e1a9b49d6b9c00948f8a49c008798ef3f3b75b65.zip | |
[X86] ISD::INSERT_SUBVECTOR - use uint64_t index. NFCI.
Keep the uint64_t type from getConstantOperandVal to stop truncation/extension overflow warnings in MSVC in subvector index math.
llvm-svn: 365328
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index d9eecaea7df..ca1f2668288 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -6760,12 +6760,12 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts, if (!isa<ConstantSDNode>(N.getOperand(2)) || !N->isOnlyUserOf(Sub.getNode())) return false; - int InsertIdx = N.getConstantOperandVal(2); + uint64_t InsertIdx = N.getConstantOperandVal(2); // Handle INSERT_SUBVECTOR(SRC0, EXTRACT_SUBVECTOR(SRC1)). if (Sub.getOpcode() == ISD::EXTRACT_SUBVECTOR && Sub.getOperand(0).getValueType() == VT && isa<ConstantSDNode>(Sub.getOperand(1))) { - int ExtractIdx = Sub.getConstantOperandVal(1); + uint64_t ExtractIdx = Sub.getConstantOperandVal(1); for (int i = 0; i != (int)NumElts; ++i) Mask.push_back(i); for (int i = 0; i != (int)NumSubElts; ++i) @@ -43625,7 +43625,7 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG, SDValue Vec = N->getOperand(0); SDValue SubVec = N->getOperand(1); - unsigned IdxVal = N->getConstantOperandVal(2); + uint64_t IdxVal = N->getConstantOperandVal(2); MVT SubVecVT = SubVec.getSimpleValueType(); if (Vec.isUndef() && SubVec.isUndef()) @@ -43641,7 +43641,7 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG, // just insert into the larger zero vector directly. if (SubVec.getOpcode() == ISD::INSERT_SUBVECTOR && ISD::isBuildVectorAllZeros(SubVec.getOperand(0).getNode())) { - unsigned Idx2Val = SubVec.getConstantOperandVal(2); + uint64_t Idx2Val = SubVec.getConstantOperandVal(2); return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, getZeroVector(OpVT, Subtarget, DAG, dl), SubVec.getOperand(1), |
