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author | Evan Cheng <evan.cheng@apple.com> | 2010-10-08 23:01:57 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-08 23:01:57 +0000 |
commit | df2aae0c5ae27322c1f1ce82e6a60da99912f636 (patch) | |
tree | a53888f811d544fdd034c2cfa5bab85cb87b4f95 | |
parent | 73853e5babc682ae4adf3b258065c75cb0037254 (diff) | |
download | bcm5719-llvm-df2aae0c5ae27322c1f1ce82e6a60da99912f636.tar.gz bcm5719-llvm-df2aae0c5ae27322c1f1ce82e6a60da99912f636.zip |
Avoid compiler warning: comparison between signed and unsigned integer.
llvm-svn: 116119
-rw-r--r-- | llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp index c0fa9ddb46d..537561d2b7e 100644 --- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -529,7 +529,7 @@ void ScheduleDAGInstrs::ComputeOperandLatency(SUnit *Def, SUnit *Use, if (DefIdx != -1) { const MachineOperand &MO = DefMI->getOperand(DefIdx); if (MO.isReg() && MO.isImplicit() && - DefIdx >= DefMI->getDesc().getNumOperands()) { + DefIdx >= (int)DefMI->getDesc().getNumOperands()) { // This is an implicit def, getOperandLatency() won't return the correct // latency. e.g. // %D6<def>, %D7<def> = VLD1q16 %R2<kill>, 0, ..., %Q3<imp-def> |