diff options
| author | Craig Topper <craig.topper@intel.com> | 2019-04-21 07:12:56 +0000 | 
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-04-21 07:12:56 +0000 | 
| commit | df02beb4165d3c07842878c6ed104622925be35b (patch) | |
| tree | 7f1f2a6d1f99d589c92a1d766479fda9af04e0a1 | |
| parent | a0f9c4f72c80cf23cda59cd6d3161a4992370078 (diff) | |
| download | bcm5719-llvm-df02beb4165d3c07842878c6ed104622925be35b.tar.gz bcm5719-llvm-df02beb4165d3c07842878c6ed104622925be35b.zip  | |
[X86] Add the rounding control operand to the printing for some scalar FMA instructions.
llvm-svn: 358844
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll | 4 | 
3 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index d3adc06441f..420a70ad5a2 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -6825,7 +6825,7 @@ let Constraints = "$src1 = $dst", hasSideEffects = 0 in {      def rb    : AVX512FMA3S<opc, MRMSrcReg, (outs _.FRC:$dst),                       (ins _.FRC:$src1, _.FRC:$src2, _.FRC:$src3, AVX512RC:$rc),                       !strconcat(OpcodeStr, -                              "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), +                              "\t{$rc, $src3, $src2, $dst|$dst, $src2, $src3, $rc}"),                       !if(MaskOnlyReg, [], [RHS_b])>, EVEX_B, EVEX_RC,                       Sched<[SchedWriteFMA.Scl]>;    }// isCodeGenOnly = 1 diff --git a/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll index 99438064f85..ff737b91264 100644 --- a/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll +++ b/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll @@ -1154,14 +1154,14 @@ define <4 x float> @foo() {  ; X86:       # %bb.0: # %entry  ; X86-NEXT:    vmovss (%eax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x00]  ; X86-NEXT:    # xmm0 = mem[0],zero,zero,zero -; X86-NEXT:    vfmsub213ss %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0] +; X86-NEXT:    vfmsub213ss {rd-sae}, %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]  ; X86-NEXT:    retl # encoding: [0xc3]  ;  ; X64-LABEL: foo:  ; X64:       # %bb.0: # %entry  ; X64-NEXT:    vmovss (%rax), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x00]  ; X64-NEXT:    # xmm0 = mem[0],zero,zero,zero -; X64-NEXT:    vfmsub213ss %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0] +; X64-NEXT:    vfmsub213ss {rd-sae}, %xmm0, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x38,0xab,0xc0]  ; X64-NEXT:    retq # encoding: [0xc3]  entry:    %0 = load <4 x float>, <4 x float>* undef, align 16 diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll index e222c0e1ae2..80d54665cd9 100644 --- a/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll +++ b/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll @@ -5875,7 +5875,7 @@ define <2 x double> @test_mm_mask3_fmsub_round_sd(<2 x double> %__W, <2 x double  ; X86:       # %bb.0: # %entry  ; X86-NEXT:    movb {{[0-9]+}}(%esp), %al  ; X86-NEXT:    vxorpd {{\.LCPI.*}}, %xmm2, %xmm3 -; X86-NEXT:    vfmadd213sd %xmm3, %xmm0, %xmm1 +; X86-NEXT:    vfmadd213sd {rn-sae}, %xmm3, %xmm0, %xmm1  ; X86-NEXT:    kmovw %eax, %k1  ; X86-NEXT:    vmovsd %xmm1, %xmm2, %xmm2 {%k1}  ; X86-NEXT:    vmovapd %xmm2, %xmm0 @@ -5884,7 +5884,7 @@ define <2 x double> @test_mm_mask3_fmsub_round_sd(<2 x double> %__W, <2 x double  ; X64-LABEL: test_mm_mask3_fmsub_round_sd:  ; X64:       # %bb.0: # %entry  ; X64-NEXT:    vxorpd {{.*}}(%rip), %xmm2, %xmm3 -; X64-NEXT:    vfmadd213sd %xmm3, %xmm0, %xmm1 +; X64-NEXT:    vfmadd213sd {rn-sae}, %xmm3, %xmm0, %xmm1  ; X64-NEXT:    kmovw %edi, %k1  ; X64-NEXT:    vmovsd %xmm1, %xmm2, %xmm2 {%k1}  ; X64-NEXT:    vmovapd %xmm2, %xmm0  | 

