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| author | Chad Rosier <mcrosier@apple.com> | 2012-09-04 16:39:38 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2012-09-04 16:39:38 +0000 |
| commit | dea7964ddb75452136a993b5e65691bdfe6ee7f4 (patch) | |
| tree | 6f7d23fbe54fb2cadf98b12dc3353316445709e2 | |
| parent | 74f3716bc40bba2e4a3eb771109393bbd3346d1c (diff) | |
| download | bcm5719-llvm-dea7964ddb75452136a993b5e65691bdfe6ee7f4.tar.gz bcm5719-llvm-dea7964ddb75452136a993b5e65691bdfe6ee7f4.zip | |
[ms-inline asm] The MCInstrDesc only tracks register definitions. For now,
assume that if the 1st operands is an expression and the instruction mayStore,
then it is a memory definition.
llvm-svn: 163144
| -rw-r--r-- | clang/lib/Sema/SemaStmtAsm.cpp | 3 | ||||
| -rw-r--r-- | clang/test/CodeGen/ms-inline-asm.c | 3 |
2 files changed, 3 insertions, 3 deletions
diff --git a/clang/lib/Sema/SemaStmtAsm.cpp b/clang/lib/Sema/SemaStmtAsm.cpp index 2af2afe398b..b6a4e62f952 100644 --- a/clang/lib/Sema/SemaStmtAsm.cpp +++ b/clang/lib/Sema/SemaStmtAsm.cpp @@ -624,7 +624,8 @@ StmtResult Sema::ActOnMSAsmStmt(SourceLocation AsmLoc, ExprResult Result = ActOnIdExpression(getCurScope(), SS, Loc, Id, false, false); if (!Result.isInvalid()) { - if (isDef) { + bool isMemDef = (i == 1) && Desc.mayStore(); + if (isDef || isMemDef) { Outputs.push_back(II); OutputExprs.push_back(Result.take()); OutputConstraints.push_back("=r"); diff --git a/clang/test/CodeGen/ms-inline-asm.c b/clang/test/CodeGen/ms-inline-asm.c index 8b4af0b9f8f..9c902cd198f 100644 --- a/clang/test/CodeGen/ms-inline-asm.c +++ b/clang/test/CodeGen/ms-inline-asm.c @@ -88,8 +88,7 @@ unsigned t10(void) { // CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4 // CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4 // CHECK: store i32 1, i32* [[I]], align 4 -// Note: The AsmParser isn't properly matching the second instruction (i.e., j is being marked as an input, when in fact it is an output). -// CHECK: call void asm sideeffect "mov eax, i\0Amov j, eax", "r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}, i32 %{{.*}}) nounwind ia_nsdialect +// CHECK: call i32 asm sideeffect "mov eax, i\0Amov j, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind ia_nsdialect // CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32* [[J]], align 4 // CHECK: ret i32 [[RET]] } |
