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| author | Tilmann Scheller <tilmann.scheller@googlemail.com> | 2013-06-28 15:09:46 +0000 |
|---|---|---|
| committer | Tilmann Scheller <tilmann.scheller@googlemail.com> | 2013-06-28 15:09:46 +0000 |
| commit | de09fae38d13663c96fa4894b8baec4b35e75a23 (patch) | |
| tree | 4ea2cf86db872a7b331b3db2f9c67da1c3b1a8eb | |
| parent | fe3a5d9cf557d1a6117db895bda0dcb590b8bfa1 (diff) | |
| download | bcm5719-llvm-de09fae38d13663c96fa4894b8baec4b35e75a23.tar.gz bcm5719-llvm-de09fae38d13663c96fa4894b8baec4b35e75a23.zip | |
ARM: Fix pseudo-instructions for SRS (Store Return State).
The mapping between SRS pseudo-instructions and SRS native instructions was incorrect, the correct mapping is:
srsfa -> srsib
srsea -> srsia
srsfd -> srsdb
srsed -> srsda
This fixes <rdar://problem/14214734>.
llvm-svn: 185155
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 8 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/basic-arm-instructions.s | 28 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/basic-thumb2-instructions.s | 12 |
3 files changed, 24 insertions, 24 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index ae874426bcb..2492c4eda11 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -5185,10 +5185,10 @@ def : MnemonicAlias<"rfeed", "rfeib">; def : MnemonicAlias<"rfe", "rfeia">; // SRS aliases -def : MnemonicAlias<"srsfa", "srsda">; -def : MnemonicAlias<"srsea", "srsdb">; -def : MnemonicAlias<"srsfd", "srsia">; -def : MnemonicAlias<"srsed", "srsib">; +def : MnemonicAlias<"srsfa", "srsib">; +def : MnemonicAlias<"srsea", "srsia">; +def : MnemonicAlias<"srsfd", "srsdb">; +def : MnemonicAlias<"srsed", "srsda">; def : MnemonicAlias<"srs", "srsia">; // QSAX == QSUBADDX diff --git a/llvm/test/MC/ARM/basic-arm-instructions.s b/llvm/test/MC/ARM/basic-arm-instructions.s index aaff80ca35d..354830561b9 100644 --- a/llvm/test/MC/ARM/basic-arm-instructions.s +++ b/llvm/test/MC/ARM/basic-arm-instructions.s @@ -2125,15 +2125,15 @@ Lforward: @ CHECK: srsia sp!, #2 @ encoding: [0x02,0x05,0xed,0xf8] @ CHECK: srsib sp!, #14 @ encoding: [0x0e,0x05,0xed,0xf9] -@ CHECK: srsda sp, #11 @ encoding: [0x0b,0x05,0x4d,0xf8] -@ CHECK: srsdb sp, #10 @ encoding: [0x0a,0x05,0x4d,0xf9] -@ CHECK: srsia sp, #9 @ encoding: [0x09,0x05,0xcd,0xf8] -@ CHECK: srsib sp, #5 @ encoding: [0x05,0x05,0xcd,0xf9] +@ CHECK: srsib sp, #11 @ encoding: [0x0b,0x05,0xcd,0xf9] +@ CHECK: srsia sp, #10 @ encoding: [0x0a,0x05,0xcd,0xf8] +@ CHECK: srsdb sp, #9 @ encoding: [0x09,0x05,0x4d,0xf9] +@ CHECK: srsda sp, #5 @ encoding: [0x05,0x05,0x4d,0xf8] -@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] -@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] -@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] @ CHECK: srsib sp!, #5 @ encoding: [0x05,0x05,0xed,0xf9] +@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] +@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] +@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] @ CHECK: srsia sp, #5 @ encoding: [0x05,0x05,0xcd,0xf8] @ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] @@ -2170,14 +2170,14 @@ Lforward: @ CHECK: srsdb sp!, #19 @ encoding: [0x13,0x05,0x6d,0xf9] @ CHECK: srsia sp!, #2 @ encoding: [0x02,0x05,0xed,0xf8] @ CHECK: srsib sp!, #14 @ encoding: [0x0e,0x05,0xed,0xf9] -@ CHECK: srsda sp, #11 @ encoding: [0x0b,0x05,0x4d,0xf8] -@ CHECK: srsdb sp, #10 @ encoding: [0x0a,0x05,0x4d,0xf9] -@ CHECK: srsia sp, #9 @ encoding: [0x09,0x05,0xcd,0xf8] -@ CHECK: srsib sp, #5 @ encoding: [0x05,0x05,0xcd,0xf9] -@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] -@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] -@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] +@ CHECK: srsib sp, #11 @ encoding: [0x0b,0x05,0xcd,0xf9] +@ CHECK: srsia sp, #10 @ encoding: [0x0a,0x05,0xcd,0xf8] +@ CHECK: srsdb sp, #9 @ encoding: [0x09,0x05,0x4d,0xf9] +@ CHECK: srsda sp, #5 @ encoding: [0x05,0x05,0x4d,0xf8] @ CHECK: srsib sp!, #5 @ encoding: [0x05,0x05,0xed,0xf9] +@ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] +@ CHECK: srsdb sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf9] +@ CHECK: srsda sp!, #5 @ encoding: [0x05,0x05,0x6d,0xf8] @ CHECK: srsia sp, #5 @ encoding: [0x05,0x05,0xcd,0xf8] @ CHECK: srsia sp!, #5 @ encoding: [0x05,0x05,0xed,0xf8] diff --git a/llvm/test/MC/ARM/basic-thumb2-instructions.s b/llvm/test/MC/ARM/basic-thumb2-instructions.s index 9eb9244faa3..618399223cb 100644 --- a/llvm/test/MC/ARM/basic-thumb2-instructions.s +++ b/llvm/test/MC/ARM/basic-thumb2-instructions.s @@ -2349,10 +2349,10 @@ _func: @ CHECK: srsia sp, #0 @ encoding: [0x8d,0xe9,0x00,0xc0] @ CHECK: srsdb sp!, #19 @ encoding: [0x2d,0xe8,0x13,0xc0] @ CHECK: srsia sp!, #2 @ encoding: [0xad,0xe9,0x02,0xc0] -@ CHECK: srsdb sp, #10 @ encoding: [0x0d,0xe8,0x0a,0xc0] -@ CHECK: srsia sp, #9 @ encoding: [0x8d,0xe9,0x09,0xc0] -@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] +@ CHECK: srsia sp, #10 @ encoding: [0x8d,0xe9,0x0a,0xc0] +@ CHECK: srsdb sp, #9 @ encoding: [0x0d,0xe8,0x09,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] +@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] @ CHECK: srsia sp, #5 @ encoding: [0x8d,0xe9,0x05,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] @@ -2375,10 +2375,10 @@ _func: @ CHECK: srsia sp, #0 @ encoding: [0x8d,0xe9,0x00,0xc0] @ CHECK: srsdb sp!, #19 @ encoding: [0x2d,0xe8,0x13,0xc0] @ CHECK: srsia sp!, #2 @ encoding: [0xad,0xe9,0x02,0xc0] -@ CHECK: srsdb sp, #10 @ encoding: [0x0d,0xe8,0x0a,0xc0] -@ CHECK: srsia sp, #9 @ encoding: [0x8d,0xe9,0x09,0xc0] -@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] +@ CHECK: srsia sp, #10 @ encoding: [0x8d,0xe9,0x0a,0xc0] +@ CHECK: srsdb sp, #9 @ encoding: [0x0d,0xe8,0x09,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] +@ CHECK: srsdb sp!, #5 @ encoding: [0x2d,0xe8,0x05,0xc0] @ CHECK: srsia sp, #5 @ encoding: [0x8d,0xe9,0x05,0xc0] @ CHECK: srsia sp!, #5 @ encoding: [0xad,0xe9,0x05,0xc0] |
