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| author | Bob Wilson <bob.wilson@apple.com> | 2009-10-06 20:18:46 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-10-06 20:18:46 +0000 |
| commit | dc7d1ce575a610217dfcc9057f82ec8f47619e72 (patch) | |
| tree | 91a47067d9c647e37cd9ec5ee589c02992d3d69f | |
| parent | 08506ee6b0c40938552d0555ce1e0cbd38f1b160 (diff) | |
| download | bcm5719-llvm-dc7d1ce575a610217dfcc9057f82ec8f47619e72.tar.gz bcm5719-llvm-dc7d1ce575a610217dfcc9057f82ec8f47619e72.zip | |
Fix a comment typo.
Patch by Johnny Chen.
llvm-svn: 83407
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 9571ecd37a8..da048be20ca 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -384,7 +384,7 @@ multiclass AsI1_bin_irs<bits<4> opcod, string opc, PatFrag opnode, } /// AI1_bin_s_irs - Similar to AsI1_bin_irs except it sets the 's' bit so the -/// instruction modifies the CSPR register. +/// instruction modifies the CPSR register. let Defs = [CPSR] in { multiclass AI1_bin_s_irs<bits<4> opcod, string opc, PatFrag opnode, bit Commutable = 0> { |
