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author | Benjamin Kramer <benny.kra@googlemail.com> | 2011-09-22 03:01:42 +0000 |
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committer | Benjamin Kramer <benny.kra@googlemail.com> | 2011-09-22 03:01:42 +0000 |
commit | dc397a640250a099d47e658f81acb4bfe8f7e363 (patch) | |
tree | bfcc2fbad454e1ea30301ecee702f68b8d2710eb | |
parent | 751c558d8efbd8097b043a0c8959c8f79394555c (diff) | |
download | bcm5719-llvm-dc397a640250a099d47e658f81acb4bfe8f7e363.tar.gz bcm5719-llvm-dc397a640250a099d47e658f81acb4bfe8f7e363.zip |
X86: Don't form min/max nodes if the target is missing SSE.
llvm-svn: 140294
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 36e254b1f58..996dd12d3e4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -12568,7 +12568,8 @@ static SDValue PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, // instructions match the semantics of the common C idiom x<y?x:y but not // x<=y?x:y, because of how they handle negative zero (which can be // ignored in unsafe-math mode). - if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && + if (Subtarget->hasXMM() && + Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() && VT != MVT::f80 && DAG.getTargetLoweringInfo().isTypeLegal(VT)) { ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); |