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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-07-06 17:02:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-07-06 17:02:20 +0000 |
| commit | db7781c6e917651a81226a60d0622f34adae6143 (patch) | |
| tree | 8d131a745ee7f5b2f63d629421dcb66e24b4af5b | |
| parent | f423f5627caed62aadb02ebecfc464dfb1c99097 (diff) | |
| download | bcm5719-llvm-db7781c6e917651a81226a60d0622f34adae6143.tar.gz bcm5719-llvm-db7781c6e917651a81226a60d0622f34adae6143.zip | |
AMDGPU: Run SIInsertWaits as pre-emit pass
Running this after the scheduler enables scheduling
waits later so other ALU instructions can run while
this would be waiting.
When combined with enabling the post-RA scheduler, this
gives about a ~20% improvement on sgemm.
llvm-svn: 241473
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index a9a911a8efe..f3955659d93 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -280,10 +280,10 @@ void GCNPassConfig::addPostRegAlloc() { } void GCNPassConfig::addPreSched2() { - addPass(createSIInsertWaits(*TM), false); } void GCNPassConfig::addPreEmitPass() { + addPass(createSIInsertWaits(*TM), false); addPass(createSILowerControlFlowPass(*TM), false); } |

