[Hexagon] Add option to generate calls to "abort" for "unreachable"

llvm-svn: 312644

2 files changed, 14 insertions, 0 deletions

diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 85a69c93a95..819c9841707 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -91,6 +91,10 @@ static cl::opt<bool> EnableVectorPrint("enable-hexagon-vector-print",
   cl::Hidden, cl::ZeroOrMore, cl::init(false),
   cl::desc("Enable Hexagon Vector print instr pass"));
 
+static cl::opt<bool> EnableTrapUnreachable("hexagon-trap-unreachable",
+  cl::Hidden, cl::ZeroOrMore, cl::init(false),
+  cl::desc("Enable generating trap for unreachable"));
+
 /// HexagonTargetMachineModule - Note that this is used on hosts that
 /// cannot link in a library unless there are references into the
 /// library.  In particular, it seems that it is not possible to get
@@ -195,6 +199,8 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT,
           TT, CPU, FS, Options, getEffectiveRelocModel(RM),
           getEffectiveCodeModel(CM), (HexagonNoOpt ? CodeGenOpt::None : OL)),
       TLOF(make_unique<HexagonTargetObjectFile>()) {
+  if (EnableTrapUnreachable)
+    this->Options.TrapUnreachable = true;
   initializeHexagonExpandCondsetsPass(*PassRegistry::getPassRegistry());
   initAsmInfo();
 }
diff --git a/llvm/test/CodeGen/Hexagon/trap-unreachable.ll b/llvm/test/CodeGen/Hexagon/trap-unreachable.ll
new file mode 100644
index 00000000000..74bc104afaf
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/trap-unreachable.ll
@@ -0,0 +1,8 @@
+; RUN: llc -march=hexagon -hexagon-trap-unreachable < %s | FileCheck %s
+; CHECK: call abort
+
+define void @fred() #0 {
+  unreachable
+}
+
+attributes #0 = { nounwind }