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| author | Craig Topper <craig.topper@intel.com> | 2018-01-16 06:07:14 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-16 06:07:14 +0000 |
| commit | daa385f480c640599f1983fec6f203752f9c05e3 (patch) | |
| tree | 658066aea5591a04ead7e7886a67643000779475 | |
| parent | d74b6a8f64fc88cb33eeecc60d7bf30b31f17fa3 (diff) | |
| download | bcm5719-llvm-daa385f480c640599f1983fec6f203752f9c05e3.tar.gz bcm5719-llvm-daa385f480c640599f1983fec6f203752f9c05e3.zip | |
[X86] Make 'xchgq %rax, %rax' an alias for the 0x90 nop encoding to match gas.
Previously we encoded it as 0x48 0x90.
llvm-svn: 322531
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86-64.s | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index d6dbf33b583..2a29084eae5 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -3310,6 +3310,10 @@ def : InstAlias<"xchg{l}\t{%eax, $src|$src, eax}", (XCHG32ar64 GR32_NOAX:$src), 0>, Requires<[In64BitMode]>; def : InstAlias<"xchg{q}\t{%rax, $src|$src, rax}", (XCHG64ar GR64:$src), 0>; +// xchg %rax, %rax is a nop in x86-64 and can be encoded as such. Without this +// we emit an unneeded REX.w prefix. +def : InstAlias<"xchg{q}\t{%rax, %rax|rax, rax}", (NOOP), 0>; + // These aliases exist to get the parser to prioritize matching 8-bit // immediate encodings over matching the implicit ax/eax/rax encodings. By // explicitly mentioning the A register here, these entries will be ordered diff --git a/llvm/test/MC/X86/x86-64.s b/llvm/test/MC/X86/x86-64.s index 17c90225a25..e47c9d9019b 100644 --- a/llvm/test/MC/X86/x86-64.s +++ b/llvm/test/MC/X86/x86-64.s @@ -1354,8 +1354,8 @@ pclmullqhqdq (%rdi), %xmm1 pclmulqdq $0, (%rdi), %xmm1 // PR10345 -// CHECK: xchgq %rax, %rax -// CHECK: encoding: [0x48,0x90] +// CHECK: nop +// CHECK: encoding: [0x90] xchgq %rax, %rax // CHECK: xchgl %eax, %eax |
