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| author | Chris Lattner <sabre@nondot.org> | 2006-12-07 01:24:16 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-12-07 01:24:16 +0000 |
| commit | d8e7451dc3414cfc43a7622e5f0051a5ac5e94a2 (patch) | |
| tree | d35f0552de376ffdd244009a5c9dcb2bc695ccba | |
| parent | e312c152d221dd85b2a6a0eff694497b2874bf71 (diff) | |
| download | bcm5719-llvm-d8e7451dc3414cfc43a7622e5f0051a5ac5e94a2.tar.gz bcm5719-llvm-d8e7451dc3414cfc43a7622e5f0051a5ac5e94a2.zip | |
Fix i64 uint_to_fp on ppc64
llvm-svn: 32297
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 1681406b396..bcdb1e1584f 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -181,7 +181,8 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) // They also have instructions for converting between i64 and fp. setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); - + setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); + // FIXME: disable this lowered code. This generates 64-bit register values, // and we don't model the fact that the top part is clobbered by calls. We // need to flag these together so that the value isn't live across a call. |
