[NVPTX] Annotate call machine instructions as calls.

Summary:
Otherwise we'll try to do unsafe optimizations on these MIs, such as
sinking loads below calls.

(I suspect that this is not the only bug in the NVPTX instruction
tablegen files; I need to comb through them.)

Reviewers: jholewinski, tra

Subscribers: jingyue, jhen, llvm-commits

Differential Revision: http://reviews.llvm.org/D17315

llvm-svn: 261113

2 files changed, 25 insertions, 0 deletions

diff --git a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
index 6fdd60f3ed2..54acf72bfbe 100644
--- a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+++ b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
@@ -1826,6 +1826,7 @@ class StoreRetvalV4Inst<NVPTXRegClass regclass, string opstr> :
                 "\t[func_retval0+$a], {{$val, $val2, $val3, $val4}};"),
                 []>;
 
+let isCall = 1 in {
 def PrintCallRetInst1 : NVPTXInst<(outs), (ins),
 "call (retval0), ",
                                 [(PrintCall (i32 1))]>;
@@ -1883,6 +1884,7 @@ def PrintCallUniRetInst8 : NVPTXInst<(outs), (ins),
 
 def PrintCallUniNoRetInst : NVPTXInst<(outs), (ins), "call.uni ",
                                 [(PrintCallUni (i32 0))]>;
+} // call instructions
 
 def LoadParamMemI64    : LoadParamMemInst<Int64Regs, ".b64">;
 def LoadParamMemI32    : LoadParamMemInst<Int32Regs, ".b32">;
diff --git a/llvm/test/CodeGen/NVPTX/MachineSink-call.ll b/llvm/test/CodeGen/NVPTX/MachineSink-call.ll
new file mode 100644
index 00000000000..3a6d43b76ae
--- /dev/null
+++ b/llvm/test/CodeGen/NVPTX/MachineSink-call.ll
@@ -0,0 +1,23 @@
+; RUN: llc < %s | FileCheck %s
+target triple = "nvptx64-nvidia-cuda"
+
+declare void @foo()
+
+; Load a value, then call a function.  Branch, and use the loaded value only on
+; one side of the branch.  The load shouldn't be sunk beneath the call, because
+; the call may modify memory.
+define i32 @f(i32 %x, i32* %ptr, i1 %cond) {
+Start:
+  ; CHECK: ld.u32
+  %ptr_val = load i32, i32* %ptr
+  ; CHECK: call.uni
+  call void @foo()
+  br i1 %cond, label %L1, label %L2
+L1:
+  %ptr_val2 = add i32 %ptr_val, 100
+  br label %L2
+L2:
+  %v4 = phi i32 [ %x, %Start ], [ %ptr_val2, %L1 ]
+  %v5 = add i32 %v4, 1000
+  ret i32 %v5
+}