diff options
author | Eric Christopher <echristo@gmail.com> | 2015-02-02 18:58:24 +0000 |
---|---|---|
committer | Eric Christopher <echristo@gmail.com> | 2015-02-02 18:58:24 +0000 |
commit | d55c7c6670231f96786cbe5aa96ef652cd955d42 (patch) | |
tree | e5f74fb43f67a7f077c675b372176cbd15c6aa18 | |
parent | d9901ff5867073cab6c1b2f8ed0702c28dcbbcc1 (diff) | |
download | bcm5719-llvm-d55c7c6670231f96786cbe5aa96ef652cd955d42.tar.gz bcm5719-llvm-d55c7c6670231f96786cbe5aa96ef652cd955d42.zip |
Sink queries into asserts since the variable is unused otherwise.
llvm-svn: 227836
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp index ae9ba7d8afa..3ce1ba6418e 100644 --- a/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp +++ b/llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp @@ -68,7 +68,6 @@ char HexagonExpandPredSpillCode::ID = 0; bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { const HexagonSubtarget &QST = Fn.getSubtarget<HexagonSubtarget>(); - const HexagonRegisterInfo *TRI = QST.getRegisterInfo(); const HexagonInstrInfo *TII = QST.getInstrInfo(); // Loop over all of the basic blocks. @@ -83,7 +82,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { if (Opc == Hexagon::STriw_pred) { // STriw_pred [R30], ofst, SrcReg; unsigned FP = MI->getOperand(0).getReg(); - assert(FP == TRI->getFrameRegister() && + assert(FP == QST.getRegisterInfo()->getFrameRegister() && "Not a Frame Pointer, Nor a Spill Slot"); assert(MI->getOperand(1).isImm() && "Not an offset"); int Offset = MI->getOperand(1).getImm(); @@ -130,7 +129,7 @@ bool HexagonExpandPredSpillCode::runOnMachineFunction(MachineFunction &Fn) { assert(Hexagon::PredRegsRegClass.contains(DstReg) && "Not a predicate register"); unsigned FP = MI->getOperand(1).getReg(); - assert(FP == TRI->getFrameRegister() && + assert(FP == QST.getRegisterInfo()->getFrameRegister() && "Not a Frame Pointer, Nor a Spill Slot"); assert(MI->getOperand(2).isImm() && "Not an offset"); int Offset = MI->getOperand(2).getImm(); |