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| author | Sanjay Patel <spatel@rotateright.com> | 2016-06-10 18:05:55 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-06-10 18:05:55 +0000 |
| commit | d558bdadd25a766cd31109a611396e53546e142b (patch) | |
| tree | b7f3300a6ef4b4c4327b9c73e59f9a03252c9eb4 | |
| parent | 840b3efeaec106175b3a45aadabf995323928309 (diff) | |
| download | bcm5719-llvm-d558bdadd25a766cd31109a611396e53546e142b.tar.gz bcm5719-llvm-d558bdadd25a766cd31109a611396e53546e142b.zip | |
[x86] add test for PR28044
llvm-svn: 272411
| -rw-r--r-- | llvm/test/CodeGen/X86/sse1.ll | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/sse1.ll b/llvm/test/CodeGen/X86/sse1.ll index fd35e75d71a..6ed3c1c48d6 100644 --- a/llvm/test/CodeGen/X86/sse1.ll +++ b/llvm/test/CodeGen/X86/sse1.ll @@ -47,3 +47,65 @@ entry: %a14 = select <4 x i1> %a1, <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+0> , <4 x float> zeroinitializer ret <4 x float> %a14 } + +; v4i32 isn't legal for SSE1, but this should be cmpps. + +define <4 x float> @PR28044(<4 x float> %a0, <4 x float> %a1) nounwind { +; CHECK-LABEL: PR28044: +; CHECK: # BB#0: +; CHECK: movaps %xmm1, %xmm2 +; CHECK-NEXT: shufps {{.*#+}} xmm2 = xmm2[3,1,2,3] +; CHECK-NEXT: movaps %xmm0, %xmm3 +; CHECK-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,1,2,3] +; CHECK-NEXT: ucomiss %xmm2, %xmm3 +; CHECK-NEXT: setnp %al +; CHECK-NEXT: sete %cl +; CHECK-NEXT: andb %al, %cl +; CHECK-NEXT: movzbl %cl, %eax +; CHECK-NEXT: shll $31, %eax +; CHECK-NEXT: sarl $31, %eax +; CHECK-NEXT: movl %eax, +; CHECK-NEXT: movaps %xmm1, %xmm2 +; CHECK-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3] +; CHECK-NEXT: movaps %xmm0, %xmm3 +; CHECK-NEXT: shufps {{.*#+}} xmm3 = xmm3[1,1,2,3] +; CHECK-NEXT: ucomiss %xmm2, %xmm3 +; CHECK-NEXT: setnp %al +; CHECK-NEXT: sete %cl +; CHECK-NEXT: andb %al, %cl +; CHECK-NEXT: movzbl %cl, %eax +; CHECK-NEXT: shll $31, %eax +; CHECK-NEXT: sarl $31, %eax +; CHECK-NEXT: movl %eax, +; CHECK-NEXT: ucomiss %xmm1, %xmm0 +; CHECK-NEXT: setnp %al +; CHECK-NEXT: sete %cl +; CHECK-NEXT: andb %al, %cl +; CHECK-NEXT: movzbl %cl, %eax +; CHECK-NEXT: shll $31, %eax +; CHECK-NEXT: sarl $31, %eax +; CHECK-NEXT: movl %eax, +; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,1,2,3] +; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,1,2,3] +; CHECK-NEXT: ucomiss %xmm1, %xmm0 +; CHECK-NEXT: setnp %al +; CHECK-NEXT: sete %cl +; CHECK-NEXT: andb %al, %cl +; CHECK-NEXT: movzbl %cl, %eax +; CHECK-NEXT: shll $31, %eax +; CHECK-NEXT: sarl $31, %eax +; CHECK-NEXT: movl %eax, +; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero +; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] +; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero +; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero +; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] +; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] +; + %cmp = fcmp oeq <4 x float> %a0, %a1 + %sext = sext <4 x i1> %cmp to <4 x i32> + %res = bitcast <4 x i32> %sext to <4 x float> + ret <4 x float> %res +} + |
