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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-07 09:18:44 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-07 09:18:44 +0000 |
| commit | d498dee7a28c8c4a1349a2664eae213c8b7fa1ac (patch) | |
| tree | 7024a999976429d96289191118381bba5603d3f0 | |
| parent | d765108cf19c5d12dd35ae240a188a0cbd7dec9b (diff) | |
| download | bcm5719-llvm-d498dee7a28c8c4a1349a2664eae213c8b7fa1ac.tar.gz bcm5719-llvm-d498dee7a28c8c4a1349a2664eae213c8b7fa1ac.zip | |
[SelectionDAG] Don't pass on DemandedElts when handling SCALAR_TO_VECTOR
Fixes an assertion:
llc: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2200: llvm::KnownBits llvm::SelectionDAG::computeKnownBits(llvm::SDValue, const llvm::APInt&, unsigned int) const: Assertion `(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && "Unexpected vector size"' failed.
Committed on behalf of: @pendingchaos (Rhys Perry)
Differential Revision: https://reviews.llvm.org/D55223
llvm-svn: 348574
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll | 11 |
2 files changed, 12 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index ddc9dc8e539..7e9c5debb25 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2352,7 +2352,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts, break; SDValue N0 = Op.getOperand(0); - Known = computeKnownBits(N0, DemandedElts, Depth + 1); + Known = computeKnownBits(N0, Depth + 1); if (N0.getValueSizeInBits() != BitWidth) Known = Known.trunc(BitWidth); diff --git a/llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll b/llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll new file mode 100644 index 00000000000..06049b77b21 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll @@ -0,0 +1,11 @@ +; RUN: llc -march=amdgcn -mcpu=gfx802 -verify-machineinstrs < %s | FileCheck %s + +; CHECK: s_waitcnt +define <2 x i16> @main(<2 x float>) #0 { + %2 = bitcast <2 x float> %0 to <4 x i16> + %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <2 x i32> <i32 0, i32 undef> + %4 = extractelement <4 x i16> %2, i32 0 + %5 = insertelement <2 x i16> %3, i16 %4, i32 0 + ret <2 x i16> %5 +} + |
