diff options
| author | Daniel Dunbar <daniel@zuster.org> | 2009-08-28 05:47:56 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2009-08-28 05:47:56 +0000 |
| commit | d46e3466e7c9185fc3833b66ed4e486edb66ef67 (patch) | |
| tree | e5196277c4ef731015bbffe29ac4478c80a34971 | |
| parent | 696a3f199b6b57dd9bda172ea6ee2e51bb49283a (diff) | |
| download | bcm5719-llvm-d46e3466e7c9185fc3833b66ed4e486edb66ef67.tar.gz bcm5719-llvm-d46e3466e7c9185fc3833b66ed4e486edb66ef67.zip | |
Fix -Asserts warning.
llvm-svn: 80338
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index b0108f23064..bc485daf6e9 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -1058,12 +1058,11 @@ ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, return; const TargetInstrDesc &Desc = MI.getDesc(); - unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); // If we get here, the immediate doesn't fit into the instruction. We folded // as much as possible above, handle the rest, providing a register that is // SP+LargeImm. - assert((Offset || AddrMode == ARMII::AddrMode4) && + assert((Offset || (Desc.TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4) && "This code isn't needed if offset already handled!"); // Insert a set of r12 with the full address: r12 = sp + offset |
