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| author | Yaxun Liu <Yaxun.Liu@amd.com> | 2019-06-26 03:33:03 +0000 |
|---|---|---|
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2019-06-26 03:33:03 +0000 |
| commit | d325eb3b56d57035141ac5d4dd58feee70e2e969 (patch) | |
| tree | 92ad40ecbacfd921d31c905edba85d92186f68da | |
| parent | 4ee933c76bf2a81e7d843c878ac80e8d67eaa535 (diff) | |
| download | bcm5719-llvm-d325eb3b56d57035141ac5d4dd58feee70e2e969.tar.gz bcm5719-llvm-d325eb3b56d57035141ac5d4dd58feee70e2e969.zip | |
Fix build failure due to missing break
llvm-svn: 364380
| -rw-r--r-- | clang/lib/Basic/Targets/ARM.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp index ceab4e7f95c..cceed8880ff 100644 --- a/clang/lib/Basic/Targets/ARM.cpp +++ b/clang/lib/Basic/Targets/ARM.cpp @@ -910,6 +910,7 @@ bool ARMTargetInfo::validateAsmConstraint( Name++; return true; } + break; case 'U': // a memory reference... switch (Name[1]) { case 'q': // ...ARMV4 ldrsb @@ -925,6 +926,7 @@ bool ARMTargetInfo::validateAsmConstraint( Name++; return true; } + break; } return false; } |
