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authorThomas Lively <tlively@google.com>2019-03-01 17:43:55 +0000
committerThomas Lively <tlively@google.com>2019-03-01 17:43:55 +0000
commitd295f514690761976199da0381d2893dabd75faa (patch)
treec000ab1fe90d045da193e14fb2f16a6178339ded
parent8a6f11f45fad375f2b42d865c841cb163fdf5686 (diff)
downloadbcm5719-llvm-d295f514690761976199da0381d2893dabd75faa.tar.gz
bcm5719-llvm-d295f514690761976199da0381d2893dabd75faa.zip
Revert "[WebAssembly] Lower SIMD shifts since they are fixed in V8"
They weren't fixed in V8. Oops. llvm-svn: 355208
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 4255e0eb158..50bd5a94f4b 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -1291,6 +1291,11 @@ SDValue WebAssemblyTargetLowering::LowerShift(SDValue Op,
// Only manually lower vector shifts
assert(Op.getSimpleValueType().isVector());
+ // Expand all vector shifts until V8 fixes its implementation
+ // TODO: remove this once V8 is fixed
+ if (!Subtarget->hasUnimplementedSIMD128())
+ return unrollVectorShift(Op, DAG);
+
// Unroll non-splat vector shifts
BuildVectorSDNode *ShiftVec;
SDValue SplatVal;
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