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authorGeoff Berry <gberry@codeaurora.org>2018-01-29 18:57:07 +0000
committerGeoff Berry <gberry@codeaurora.org>2018-01-29 18:57:07 +0000
commitd1be91127c38fd0db6ab45a1797d3a38b71a19a4 (patch)
tree6c473acbc27a89467262dd339d45de1ea5748e02
parentd37dc77b6e52d46f2388070f2fd530424b49a8cd (diff)
downloadbcm5719-llvm-d1be91127c38fd0db6ab45a1797d3a38b71a19a4.tar.gz
bcm5719-llvm-d1be91127c38fd0db6ab45a1797d3a38b71a19a4.zip
[MachineVerifier] Add check that renamable operands aren't reserved registers.
Summary: Reviewers: qcolombet, MatzeB Subscribers: arsenm, sdardis, nhaehnle, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D42449 llvm-svn: 323676
-rw-r--r--llvm/lib/CodeGen/MachineVerifier.cpp14
1 files changed, 8 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index e0cc2ca9a2a..d0ac88369dc 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1101,12 +1101,14 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
}
}
}
- if (MO->isRenamable() &&
- ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
- (MO->isUse() && MI->hasExtraSrcRegAllocReq()))) {
- report("Illegal isRenamable setting for opcode with extra regalloc "
- "requirements",
- MO, MONum);
+ if (MO->isRenamable()) {
+ if ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
+ (MO->isUse() && MI->hasExtraSrcRegAllocReq()))
+ report("Illegal isRenamable setting for opcode with extra regalloc "
+ "requirements",
+ MO, MONum);
+ if (MRI->isReserved(Reg))
+ report("isRenamable set on reserved register", MO, MONum);
return;
}
} else {
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