Added functions to lldb_private::Address to set an address from a load address

and set the address as an opcode address or as a callable address. This is
needed in various places in the thread plans to make sure that addresses that
might be found in symbols or runtime might already have extra bits set (ARM/Thumb).
The new functions are:

bool
Address::SetCallableLoadAddress (lldb::addr_t load_addr, Target *target);

bool
Address::SetOpcodeLoadAddress (lldb::addr_t load_addr, Target *target);

SetCallableLoadAddress will initialize a section offset address if it can,
and if so it might possibly set some bits in the address to make the address
callable (bit zero might get set for ARM for Thumb functions).

SetOpcodeLoadAddress will initialize a section offset address using the
specified target and it will strip any special address bits if needed 
depending on the target.

Fixed the ABIMacOSX_arm::GetArgumentValues() function to require arguments
1-4 to be in the needed registers (previously this would incorrectly fallback
to the stack) and return false if unable to get the register values. The
function was also modified to first look for the generic argument registers
and then fall back to finding the registers by name.

Fixed the objective trampoline handler to use the new Address::SetOpcodeLoadAddress
function when needed to avoid address mismatches when trying to complete 
steps into objective C methods. Make similar fixes inside the
AppleThreadPlanStepThroughObjCTrampoline::ShouldStop() function.

Modified ProcessGDBRemote::BuildDynamicRegisterInfo(...) to be able to deal with
the new generic argument registers.

Modified RNBRemote::HandlePacket_qRegisterInfo() to handle the new generic
argument registers on the debugserver side.

Modified DNBArchMachARM::NumSupportedHardwareBreakpoints() to be able to 
detect how many hardware breakpoint registers there are using a darwin sysctl.
Did the same for hardware watchpoints in 
DNBArchMachARM::NumSupportedHardwareWatchpoints().

llvm-svn: 131834

8 files changed, 215 insertions, 94 deletions

diff --git a/lldb/include/lldb/Core/Address.h b/lldb/include/lldb/Core/Address.h
index 2f69bc87579..dddb2f1d0d1 100644
--- a/lldb/include/lldb/Core/Address.h
+++ b/lldb/include/lldb/Core/Address.h
@@ -419,6 +419,12 @@ public:
     //------------------------------------------------------------------
     bool
     SetLoadAddress (lldb::addr_t load_addr, Target *target);
+    
+    bool
+    SetOpcodeLoadAddress (lldb::addr_t load_addr, Target *target);
+
+    bool
+    SetCallableLoadAddress (lldb::addr_t load_addr, Target *target);
 
     //------------------------------------------------------------------
     /// Get accessor for the module for this address.
diff --git a/lldb/source/Core/Address.cpp b/lldb/source/Core/Address.cpp
index 7ab02a40f9a..d4b80923029 100644
--- a/lldb/source/Core/Address.cpp
+++ b/lldb/source/Core/Address.cpp
@@ -334,6 +334,43 @@ Address::GetCallableLoadAddress (Target *target) const
     return code_addr;
 }
 
+bool
+Address::SetCallableLoadAddress (lldb::addr_t load_addr, Target *target)
+{
+    if (SetLoadAddress (load_addr, target))
+    {
+        switch (target->GetArchitecture().GetMachine())
+        {
+            case llvm::Triple::arm:
+            case llvm::Triple::thumb:
+                // Check if bit zero it no set?
+                if ((m_offset & 1ull) == 0)
+                {
+                    // Bit zero isn't set, check if the address is a multiple of 2?
+                    if (m_offset & 2ull)
+                    {
+                        // The address is a multiple of 2 so it must be thumb, set bit zero
+                        m_offset |= 1ull;
+                    }
+                    else if (GetAddressClass() == eAddressClassCodeAlternateISA)
+                    {
+                        // We checked the address and the address claims to be the alternate ISA
+                        // which means thumb, so set bit zero.
+                        m_offset |= 1ull;
+                    }
+                }
+                break;
+                
+            default:
+                break;
+        }
+        return true;
+    }
+    return false;
+}
+
+
+
 addr_t
 Address::GetOpcodeLoadAddress (Target *target) const
 {
@@ -357,6 +394,27 @@ Address::GetOpcodeLoadAddress (Target *target) const
 }
 
 bool
+Address::SetOpcodeLoadAddress (lldb::addr_t load_addr, Target *target)
+{
+    if (SetLoadAddress (load_addr, target))
+    {
+        switch (target->GetArchitecture().GetMachine())
+        {
+            case llvm::Triple::arm:
+            case llvm::Triple::thumb:
+                // Make sure bit zero is clear
+                m_offset &= ~(1ull);
+                break;
+                
+            default:
+                break;
+        }
+        return true;
+    }
+    return false;
+}
+
+bool
 Address::Dump (Stream *s, ExecutionContextScope *exe_scope, DumpStyle style, DumpStyle fallback_style, uint32_t addr_size) const
 {
     // If the section was NULL, only load address is going to work.
diff --git a/lldb/source/Plugins/ABI/MacOSX-arm/ABIMacOSX_arm.cpp b/lldb/source/Plugins/ABI/MacOSX-arm/ABIMacOSX_arm.cpp
index 212f06a0f31..d7a609166d1 100644
--- a/lldb/source/Plugins/ABI/MacOSX-arm/ABIMacOSX_arm.cpp
+++ b/lldb/source/Plugins/ABI/MacOSX-arm/ABIMacOSX_arm.cpp
@@ -194,8 +194,6 @@ ABIMacOSX_arm::GetArgumentValues (Thread &thread,
     if (!reg_ctx)
         return false;
         
-    bool arg_regs_exceeded = false;
-    
     addr_t sp = reg_ctx->GetSP(0);
     
     if (!sp)
@@ -231,16 +229,29 @@ ABIMacOSX_arm::GetArgumentValues (Thread &thread,
             
             if (bit_width <= (thread.GetProcess().GetAddressByteSize() * 8))
             {
-                if (!arg_regs_exceeded)
+                if (value_idx < 4)
                 {
+                    // Arguments 1-4 are in r0-r3...
+                    const RegisterInfo *arg_reg_info = NULL;
+                    // Search by generic ID first, then fall back to by name
                     uint32_t arg_reg_num = reg_ctx->ConvertRegisterKindToRegisterNumber (eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + value_idx);
-                    if (arg_reg_num == LLDB_INVALID_REGNUM)
+                    if (arg_reg_num != LLDB_INVALID_REGNUM)
                     {
-                        arg_regs_exceeded = true;
+                        arg_reg_info = reg_ctx->GetRegisterInfoAtIndex(arg_reg_num);
                     }
                     else
                     {
-                        const RegisterInfo *arg_reg_info = reg_ctx->GetRegisterInfoAtIndex(arg_reg_num);
+                        switch (value_idx)
+                        {
+                            case 0: arg_reg_info = reg_ctx->GetRegisterInfoByName("r0"); break;
+                            case 1: arg_reg_info = reg_ctx->GetRegisterInfoByName("r1"); break;
+                            case 2: arg_reg_info = reg_ctx->GetRegisterInfoByName("r2"); break;
+                            case 3: arg_reg_info = reg_ctx->GetRegisterInfoByName("r3"); break;
+                        }
+                    }
+
+                    if (arg_reg_info)
+                    {
                         RegisterValue reg_value;
                         
                         if (reg_ctx->ReadRegister(arg_reg_info, reg_value))
@@ -251,37 +262,36 @@ ABIMacOSX_arm::GetArgumentValues (Thread &thread,
                                 return false;
                             continue;
                         }
-                        else
-                        {
-                            return false;
-                        }
                     }
+                    return false;
                 }
-                
-                
-                const uint32_t arg_byte_size = (bit_width + (8-1)) / 8;
-                if (arg_byte_size <= sizeof(uint64_t))
+                else
                 {
-                    uint8_t arg_data[sizeof(uint64_t)];
-                    Error error;
-                    thread.GetProcess().ReadMemory(sp, arg_data, sizeof(arg_data), error);
-                    DataExtractor arg_data_extractor (arg_data, sizeof(arg_data), 
-                                                      thread.GetProcess().GetTarget().GetArchitecture().GetByteOrder(), 
-                                                      thread.GetProcess().GetTarget().GetArchitecture().GetAddressByteSize());
-                    uint32_t offset = 0;
-                    if (arg_byte_size <= 4)
-                        value->GetScalar() = arg_data_extractor.GetMaxU32 (&offset, arg_byte_size);
-                    else if (arg_byte_size <= 8)
-                        value->GetScalar() = arg_data_extractor.GetMaxU64 (&offset, arg_byte_size);
-                    else
-                        return false;
+                    // Arguments 5 on up are on the stack
+                    const uint32_t arg_byte_size = (bit_width + (8-1)) / 8;
+                    if (arg_byte_size <= sizeof(uint64_t))
+                    {
+                        uint8_t arg_data[sizeof(uint64_t)];
+                        Error error;
+                        thread.GetProcess().ReadMemory(sp, arg_data, sizeof(arg_data), error);
+                        DataExtractor arg_data_extractor (arg_data, sizeof(arg_data), 
+                                                          thread.GetProcess().GetTarget().GetArchitecture().GetByteOrder(), 
+                                                          thread.GetProcess().GetTarget().GetArchitecture().GetAddressByteSize());
+                        uint32_t offset = 0;
+                        if (arg_byte_size <= 4)
+                            value->GetScalar() = arg_data_extractor.GetMaxU32 (&offset, arg_byte_size);
+                        else if (arg_byte_size <= 8)
+                            value->GetScalar() = arg_data_extractor.GetMaxU64 (&offset, arg_byte_size);
+                        else
+                            return false;
 
-                    if (offset == 0 || offset == UINT32_MAX)
-                        return false;
+                        if (offset == 0 || offset == UINT32_MAX)
+                            return false;
 
-                    if (is_signed)
-                        value->GetScalar().SignExtend (bit_width);
-                    sp += arg_byte_size;
+                        if (is_signed)
+                            value->GetScalar().SignExtend (bit_width);
+                        sp += arg_byte_size;
+                    }
                 }
             }
         }
diff --git a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
index 554f5193135..8d402cfff42 100644
--- a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
+++ b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
@@ -562,7 +562,7 @@ AppleObjCTrampolineHandler::AppleObjCTrampolineHandler (ProcessSP process_sp, Mo
             // Problem is we also need to lookup the dispatch function.  For now we could have a side table of stret & non-stret
             // dispatch functions.  If that's as complex as it gets, we're fine.
             
-            lldb::addr_t sym_addr = msgSend_symbol->GetValue().GetLoadAddress(target);
+            lldb::addr_t sym_addr = msgSend_symbol->GetValue().GetOpcodeLoadAddress(target);
             
             m_msgSend_map.insert(std::pair<lldb::addr_t, int>(sym_addr, i));
         }
@@ -854,7 +854,7 @@ AppleObjCTrampolineHandler::GetStepThroughDispatchPlan (Thread &thread, bool sto
                 flag_value.GetScalar() = 1;
             else
                 flag_value.GetScalar() = 0;  // FIXME - Set to 0 when debugging is done.
-                 dispatch_values.PushValue (flag_value);
+            dispatch_values.PushValue (flag_value);
 
             // Now, if we haven't already, make and insert the function as a ClangUtilityFunction, and make and insert 
             // it's runner ClangFunction.
@@ -880,7 +880,7 @@ AppleObjCTrampolineHandler::GetStepThroughDispatchPlan (Thread &thread, bool sto
                         if (sc.symbol != NULL)
                             impl_code_address = sc.symbol->GetValue();
                             
-                        //lldb::addr_t addr = impl_code_address.GetLoadAddress (exe_ctx.target);
+                        //lldb::addr_t addr = impl_code_address.GetOpcodeLoadAddress (exe_ctx.target);
                         //printf ("Getting address for our_utility_function: 0x%llx.\n", addr);
                     }
                     else
diff --git a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.cpp b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.cpp
index 39e1d8dca0a..f235fd57974 100644
--- a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.cpp
+++ b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleThreadPlanStepThroughObjCTrampoline.cpp
@@ -74,7 +74,7 @@ AppleThreadPlanStepThroughObjCTrampoline::DidPush ()
 
 void
 AppleThreadPlanStepThroughObjCTrampoline::GetDescription (Stream *s,
-                lldb::DescriptionLevel level)
+                                                          lldb::DescriptionLevel level)
 {
     if (level == lldb::eDescriptionLevelBrief)
         s->Printf("Step through ObjC trampoline");
@@ -119,7 +119,8 @@ AppleThreadPlanStepThroughObjCTrampoline::ShouldStop (Event *event_ptr)
             m_impl_function->FetchFunctionResults (exc_context, m_args_addr, target_addr_value);
             m_impl_function->DeallocateFunctionResults(exc_context, m_args_addr);
             lldb::addr_t target_addr = target_addr_value.GetScalar().ULongLong();
-            Address target_address(NULL, target_addr);
+            Address target_so_addr;
+            target_so_addr.SetOpcodeLoadAddress(target_addr, exc_context.target);
             LogSP log(lldb_private::GetLogIfAllCategoriesSet (LIBLLDB_LOG_STEP));
             if (target_addr == 0)
             {
@@ -153,11 +154,11 @@ AppleThreadPlanStepThroughObjCTrampoline::ShouldStop (Event *event_ptr)
             assert (objc_runtime != NULL);
             objc_runtime->AddToMethodCache (m_isa_addr, m_sel_addr, target_addr);
             if (log)
-                log->Printf("Adding {0x%llx, 0x%llx} = 0x%llx to cache.", m_isa_addr, m_sel_addr, target_addr);
+                log->Printf("Adding {isa-addr=0x%llx, sel-addr=0x%llx} = addr=0x%llx to cache.", m_isa_addr, m_sel_addr, target_addr);
 
             // Extract the target address from the value:
             
-            m_run_to_sp.reset(new ThreadPlanRunToAddress(m_thread, target_address, m_stop_others));
+            m_run_to_sp.reset(new ThreadPlanRunToAddress(m_thread, target_so_addr, m_stop_others));
             m_thread.QueueThreadPlan(m_run_to_sp, false);
             m_run_to_sp->SetPrivate(true);
             return false;
diff --git a/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp b/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
index 5cfc52a6675..e8335c6bd54 100644
--- a/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+++ b/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
@@ -302,6 +302,23 @@ ProcessGDBRemote::BuildDynamicRegisterInfo (bool force)
                             reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_RA;
                         else if (value.compare("flags") == 0)
                             reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_FLAGS;
+                        else if (value.find("arg") == 0)
+                        {
+                            if (value.size() == 4)
+                            {
+                                switch (value[3])
+                                {
+                                    case '1': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG1; break;
+                                    case '2': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG2; break;
+                                    case '3': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG3; break;
+                                    case '4': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG4; break;
+                                    case '5': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG5; break;
+                                    case '6': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG6; break;
+                                    case '7': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG7; break;
+                                    case '8': reg_info.kinds[eRegisterKindGeneric] = LLDB_REGNUM_GENERIC_ARG8; break;
+                                }
+                            }
+                        }
                     }
                 }
 
diff --git a/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp b/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
index d637b5e501e..6ebcd60845b 100644
--- a/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
+++ b/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
@@ -2058,39 +2058,48 @@ DNBArchMachARM::NumSupportedHardwareBreakpoints()
         // Set this to zero in case we can't tell if there are any HW breakpoints
         g_num_supported_hw_breakpoints = 0;
 
-        // Read the DBGDIDR to get the number of available hardware breakpoints
-        // However, in some of our current armv7 processors, hardware
-        // breakpoints/watchpoints were not properly connected. So detect those
-        // cases using a field in a sysctl. For now we are using "hw.cpusubtype"
-        // field to distinguish CPU architectures. This is a hack until we can
-        // get <rdar://problem/6372672> fixed, at which point we will switch to
-        // using a different sysctl string that will tell us how many BRPs
-        // are available to us directly without having to read DBGDIDR.
-        uint32_t register_DBGDIDR;
-
-        asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
-        uint32_t numBRPs = bits(register_DBGDIDR, 27, 24);
-        // Zero is reserved for the BRP count, so don't increment it if it is zero
-        if (numBRPs > 0)
-            numBRPs++;
-        DNBLogThreadedIf(LOG_THREAD, "DBGDIDR=0x%8.8x (number BRP pairs = %u)", register_DBGDIDR, numBRPs);
-
-        if (numBRPs > 0)
+        size_t len;
+        uint32_t n = 0;
+        len = sizeof (n);
+        if (::sysctlbyname("hw.optional.breakpoint", &n, &len, NULL, 0) == 0)
         {
-            uint32_t cpusubtype;
-            size_t len;
-            len = sizeof(cpusubtype);
-            // TODO: remove this hack and change to using hw.optional.xx when implmented
-            if (::sysctlbyname("hw.cpusubtype", &cpusubtype, &len, NULL, 0) == 0)
+            g_num_supported_hw_breakpoints = n;
+            DNBLogThreadedIf(LOG_THREAD, "hw.optional.breakpoint=%u", n);
+        }
+        else
+        {
+            // Read the DBGDIDR to get the number of available hardware breakpoints
+            // However, in some of our current armv7 processors, hardware
+            // breakpoints/watchpoints were not properly connected. So detect those
+            // cases using a field in a sysctl. For now we are using "hw.cpusubtype"
+            // field to distinguish CPU architectures. This is a hack until we can
+            // get <rdar://problem/6372672> fixed, at which point we will switch to
+            // using a different sysctl string that will tell us how many BRPs
+            // are available to us directly without having to read DBGDIDR.
+            uint32_t register_DBGDIDR;
+
+            asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
+            uint32_t numBRPs = bits(register_DBGDIDR, 27, 24);
+            // Zero is reserved for the BRP count, so don't increment it if it is zero
+            if (numBRPs > 0)
+                numBRPs++;
+            DNBLogThreadedIf(LOG_THREAD, "DBGDIDR=0x%8.8x (number BRP pairs = %u)", register_DBGDIDR, numBRPs);
+
+            if (numBRPs > 0)
             {
-                DNBLogThreadedIf(LOG_THREAD, "hw.cpusubtype=0x%d", cpusubtype);
-                if (cpusubtype == CPU_SUBTYPE_ARM_V7)
-                    DNBLogThreadedIf(LOG_THREAD, "Hardware breakpoints disabled for armv7 (rdar://problem/6372672)");
-                else
-                    g_num_supported_hw_breakpoints = numBRPs;
+                uint32_t cpusubtype;
+                len = sizeof(cpusubtype);
+                // TODO: remove this hack and change to using hw.optional.xx when implmented
+                if (::sysctlbyname("hw.cpusubtype", &cpusubtype, &len, NULL, 0) == 0)
+                {
+                    DNBLogThreadedIf(LOG_THREAD, "hw.cpusubtype=%d", cpusubtype);
+                    if (cpusubtype == CPU_SUBTYPE_ARM_V7)
+                        DNBLogThreadedIf(LOG_THREAD, "Hardware breakpoints disabled for armv7 (rdar://problem/6372672)");
+                    else
+                        g_num_supported_hw_breakpoints = numBRPs;
+                }
             }
         }
-
     }
     return g_num_supported_hw_breakpoints;
 }
@@ -2106,37 +2115,49 @@ DNBArchMachARM::NumSupportedHardwareWatchpoints()
     {
         // Set this to zero in case we can't tell if there are any HW breakpoints
         g_num_supported_hw_watchpoints = 0;
-        // Read the DBGDIDR to get the number of available hardware breakpoints
-        // However, in some of our current armv7 processors, hardware
-        // breakpoints/watchpoints were not properly connected. So detect those
-        // cases using a field in a sysctl. For now we are using "hw.cpusubtype"
-        // field to distinguish CPU architectures. This is a hack until we can
-        // get <rdar://problem/6372672> fixed, at which point we will switch to
-        // using a different sysctl string that will tell us how many WRPs
-        // are available to us directly without having to read DBGDIDR.
-
-        uint32_t register_DBGDIDR;
-        asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
-        uint32_t numWRPs = bits(register_DBGDIDR, 31, 28) + 1;
-        DNBLogThreadedIf(LOG_THREAD, "DBGDIDR=0x%8.8x (number WRP pairs = %u)", register_DBGDIDR, numWRPs);
-
-        if (numWRPs > 0)
+        
+        
+        size_t len;
+        uint32_t n = 0;
+        len = sizeof (n);
+        if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0)
         {
-            uint32_t cpusubtype;
-            size_t len;
-            len = sizeof(cpusubtype);
-            // TODO: remove this hack and change to using hw.optional.xx when implmented
-            if (::sysctlbyname("hw.cpusubtype", &cpusubtype, &len, NULL, 0) == 0)
+            g_num_supported_hw_watchpoints = n;
+            DNBLogThreadedIf(LOG_THREAD, "hw.optional.watchpoint=%u", n);
+        }
+        else
+        {
+            // Read the DBGDIDR to get the number of available hardware breakpoints
+            // However, in some of our current armv7 processors, hardware
+            // breakpoints/watchpoints were not properly connected. So detect those
+            // cases using a field in a sysctl. For now we are using "hw.cpusubtype"
+            // field to distinguish CPU architectures. This is a hack until we can
+            // get <rdar://problem/6372672> fixed, at which point we will switch to
+            // using a different sysctl string that will tell us how many WRPs
+            // are available to us directly without having to read DBGDIDR.
+
+            uint32_t register_DBGDIDR;
+            asm("mrc p14, 0, %0, c0, c0, 0" : "=r" (register_DBGDIDR));
+            uint32_t numWRPs = bits(register_DBGDIDR, 31, 28) + 1;
+            DNBLogThreadedIf(LOG_THREAD, "DBGDIDR=0x%8.8x (number WRP pairs = %u)", register_DBGDIDR, numWRPs);
+
+            if (numWRPs > 0)
             {
-                DNBLogThreadedIf(LOG_THREAD, "hw.cpusubtype=0x%d", cpusubtype);
+                uint32_t cpusubtype;
+                size_t len;
+                len = sizeof(cpusubtype);
+                // TODO: remove this hack and change to using hw.optional.xx when implmented
+                if (::sysctlbyname("hw.cpusubtype", &cpusubtype, &len, NULL, 0) == 0)
+                {
+                    DNBLogThreadedIf(LOG_THREAD, "hw.cpusubtype=0x%d", cpusubtype);
 
-                if (cpusubtype == CPU_SUBTYPE_ARM_V7)
-                    DNBLogThreadedIf(LOG_THREAD, "Hardware watchpoints disabled for armv7 (rdar://problem/6372672)");
-                else
-                    g_num_supported_hw_watchpoints = numWRPs;
+                    if (cpusubtype == CPU_SUBTYPE_ARM_V7)
+                        DNBLogThreadedIf(LOG_THREAD, "Hardware watchpoints disabled for armv7 (rdar://problem/6372672)");
+                    else
+                        g_num_supported_hw_watchpoints = numWRPs;
+                }
             }
         }
-
     }
     return g_num_supported_hw_watchpoints;
 }
diff --git a/lldb/tools/debugserver/source/RNBRemote.cpp b/lldb/tools/debugserver/source/RNBRemote.cpp
index 5eed2c571a3..2548d3d04cc 100644
--- a/lldb/tools/debugserver/source/RNBRemote.cpp
+++ b/lldb/tools/debugserver/source/RNBRemote.cpp
@@ -1453,6 +1453,14 @@ RNBRemote::HandlePacket_qRegisterInfo (const char *p)
             case GENERIC_REGNUM_SP:     ostrm << "generic:sp;"; break;
             case GENERIC_REGNUM_RA:     ostrm << "generic:ra;"; break;
             case GENERIC_REGNUM_FLAGS:  ostrm << "generic:flags;"; break;
+            case GENERIC_REGNUM_ARG1:   ostrm << "generic:arg1;"; break;
+            case GENERIC_REGNUM_ARG2:   ostrm << "generic:arg2;"; break;
+            case GENERIC_REGNUM_ARG3:   ostrm << "generic:arg3;"; break;
+            case GENERIC_REGNUM_ARG4:   ostrm << "generic:arg4;"; break;
+            case GENERIC_REGNUM_ARG5:   ostrm << "generic:arg5;"; break;
+            case GENERIC_REGNUM_ARG6:   ostrm << "generic:arg6;"; break;
+            case GENERIC_REGNUM_ARG7:   ostrm << "generic:arg7;"; break;
+            case GENERIC_REGNUM_ARG8:   ostrm << "generic:arg8;"; break;
             default: break;
         }